Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2007-06-19
2007-06-19
Portka, Gary (Department: 2188)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S220000, C711S170000
Reexamination Certificate
active
10988959
ABSTRACT:
Methods and systems are provided for determining the physical address of an allocated and locked memory buffer. An application program may request the allocation of a memory buffer. A virtual memory address for the memory buffer is then returned. The virtual memory address is adjusted to correspond to a page boundary within a physical memory address space. The memory buffer is then locked to the physical memory. A predetermined bit pattern is then written to the memory buffer. A search may then be made of the physical memory for the bit pattern to determine the location within the physical memory address space of the allocated memory buffer. Once the physical address of the memory buffer has been determined, it may be utilized to reference the memory buffer by a program that would not otherwise have access to the virtual address space.
REFERENCES:
patent: 6928529 (2005-08-01), Shinomiya
patent: 2002/0172199 (2002-11-01), Scott et al.
patent: 2003/0033431 (2003-02-01), Shinomiya
McCallum Andrew Clifford
Petree, Jr. Jerry Lynn
Righi Stefano
Amed Hamdy
American Megatrends Inc.
Hope Baldauff Hartman LLC
Portka Gary
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