Method, system and apparatus for constructing resistive vias

Details Method, system and apparatus for constructing resistive vias Method, system and apparatus for constructing resistive vias

2005-12-27

2005-12-27

Smith, Matthew (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06981239

ABSTRACT:
A system, method and apparatus for constructing capped resistive vias are disclosed. In a preferred embodiment, a bare, electronic component substrate or printed circuit board via is preferably surrounded at each opening by a conductive pad. Defined by openings at a first and second surface of the substrate and a conductive material free wall defining the via is a void filled with one or more resistive inks and/or fills. A conductive cap is preferably coupled to the conductive pads such that an opening therein and the resistive fill exposed at the surface of the substrate is substantially covered. The presence of the conductive cap enables one or more electronic component conductors to be coupled directly to the capped resistive via.

REFERENCES:
patent: 5164699 (1992-11-01), Smith et al.
patent: 5247455 (1993-09-01), Yoshikawa
patent: 5906042 (1999-05-01), Lan et al.
patent: 5990421 (1999-11-01), Yee
patent: 6096411 (2000-08-01), Nakatani et al.
patent: 6493861 (2002-12-01), Li et al.
patent: 6662429 (2003-12-01), Domorazek
patent: 6859915 (2005-02-01), Frank et al.
patent: 2003/0081719 (2003-05-01), Ida et al.
patent: 2003/0116856 (2003-06-01), Tomsio et al.

Affiliated with

Also associated with

Rating

Method, system and apparatus for constructing resistive vias does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method, system and apparatus for constructing resistive vias, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method, system and apparatus for constructing resistive vias will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3516558