Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-01-31
2006-01-31
Lin, Sun James (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C718S001000, C718S001000
Reexamination Certificate
active
06993739
ABSTRACT:
A method, structure and computer program product are provided for implementing high frequency return current paths within electronic packages. Electronic package physical design data is received for identifying a design layout. For each of a plurality of cells in a grid of a set cell size within the identified design layout, a respective number of signal vias, reference voltage vias, and ground vias are identified. A signal to reference via ratio is calculated for each of the plurality of cells. Each cell having a calculated signal to reference via ratio greater than a target ratio is identified. Vias are selectively added within each of the identified cells for providing high frequency return current paths.
REFERENCES:
Hubing et al., “Identifying and Quantifying Print Circuit Board Inductance”, Aug. 1994, IEEE International Symposium on Electromagnetic Compatibility, Symposium Record pp. 205-208.
Chen et al., “Via and Return Path Discontinuity Impact to High Speed Digital Signal Quality”, Oct. 2000, IEEE Conference on Electrical Performance of Electronic Packaging, Digest, pp. 215-218.
Pak et al., “Prediction and Verification of Power/Ground Plane Edge Radiation Excited by Through-Hole Signal Via Based on Balanced TLM and Via Coupling Model”, Oct. 2003, IEEE Conference on Electrical Performance of Electronic Packaging, pp. 181-184.
Becker Darryl John
Douriet Daniel
Doyle Matthew Stephen
Maki Andrew B.
Ziegelbein Joel David
International Business Machines - Corporation
Lin Sun James
Pennington Joan
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