Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2011-07-05
2011-07-05
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S137000
Reexamination Certificate
active
07975251
ABSTRACT:
A design method includes creating power supply planes in each layer of a circuit board, from CAD data of the circuit boards whereby the power supply planes form one power supply conductor interconnect and supply power or connect to ground, expanding the shape of the power supply planes by a predetermined width, creating power supply pairs which are formed by opposing portions wherein two power supply planes existing in different layers are separated by an insulator and correcting the parameter by use of the mesh area.
REFERENCES:
patent: 6803655 (2004-10-01), Fujio et al.
patent: 2003/0083856 (2003-05-01), Yoshimura et al.
patent: 2004/0225487 (2004-11-01), Iwakura et al.
patent: 2006/0036980 (2006-02-01), Kobayashi
patent: 2008/0291602 (2008-11-01), Devoe
patent: 2009/0034155 (2009-02-01), Devoe
patent: 2003-141205 (2003-05-01), None
patent: 2004-234618 (2004-08-01), None
patent: 2004-334654 (2004-11-01), None
patent: 2006-031510 (2006-02-01), None
Fujitsu Limited
Siek Vuthe
Staas & Halsey , LLP
LandOfFree
Method, recording medium, and design support system for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method, recording medium, and design support system for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method, recording medium, and design support system for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2618864