Method of writing to scalable magnetoresistance random...

Static information storage and retrieval – Systems using particular element – Magnetoresistive

Reexamination Certificate

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C365S171000, C365S173000

Reexamination Certificate

active

06545906

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to semiconductor memory devices.
More particularly, the present invention relates to semiconductor random access memory devices that utilize a magnetic field.
BACKGROUND OF THE INVENTION
Non-volatile memory devices are an extremely important component in electronic systems. FLASH is the major non-volatile memory device in use today. Typical non-volatile memory devices use charges trapped in a floating oxide layer to store information. Disadvantages of FLASH memory include high voltage requirements and slow program and erase times. Also, FLASH memory has a poor write endurance of 10
4
-10
6
cycles before memory failure. In addition, to maintain reasonable data retention, the scaling of the gate oxide is restricted by the tunneling barrier seen by the electrons. Hence, FLASH memory is limited in the dimensions to which it can be scaled.
To overcome these shortcomings, magnetic memory devices are being evaluated. One such device is magnetoresistive RAM (hereinafter referred to as “MRAM”). To be commercially practical, however, MRAM must have comparable memory density to current memory technologies, be scalable for future generations, operate at low voltages, have low power consumption, and have competitive read/write speeds.
For an MRAM device, the stability of the nonvolatile memory state, the repeatability of the read/write cycles, and the memory element-to-element switching field uniformity are three of the most important aspects of its design characteristics. A memory state in MRAM is not maintained by power, but rather by the direction of the magnetic moment vector. Storing data is accomplished by applying magnetic fields and causing a magnetic material in a MRAM device to be magnetized into either of two possible memory states. Recalling data is accomplished by sensing the resistive differences in the MRAM device between the two states. The magnetic fields for writing are created by passing currents through strip lines external to the magnetic structure or through the magnetic structures themselves.
As the lateral dimension of an MRAM device decreases, three problems occur. First, the switching field increases for a given shape and film thickness, requiring a larger magnetic field to switch. Second, the total switching volume is reduced so that the energy barrier for reversal decreases. The energy barrier refers to the amount of energy needed to switch the magnetic moment vector from one state to the other. The energy barrier determines the data retention and error rate of the MRAM device and unintended reversals can occur due to thermofluctuations (superparamagnetism) if the barrier is too small. A major problem with having a small energy barrier is that it becomes extremely difficult to selectively switch one MRAM device in an array. Selectablility allows switching without inadvertently switching other MRAM devices. Finally, because the switching field is produced by shape, the switching field becomes more sensitive to shape variations as the MRAM device decreases in size. With photolithography scaling becoming more difficult at smaller dimensions, MRAM devices will have difficulty maintaining tight switching distributions.
It would be highly advantageous, therefore, to remedy the foregoing and other deficiencies inherent in the prior art.
Accordingly, it is an object of the present invention to provide a new and improved method of writing to a magnetoresistive random access memory device.
It is an object of the present invention to provide a new and improved method of writing to a magnetoresistive random access memory device which is highly selectable.
It is another object of the present invention to provide a new and improved method of writing to a magnetoresistive random access memory device which has an improved error rate.
It is another object of the present invention to provide a new and improved method of writing to a magnetoresistive random access memory device which has a switching field that is less dependant on shape.
SUMMARY OF THE INVENTION
To achieve the objects and advantages specified above and others, a method of writing to a scalable magnetoresistive memory array is disclosed. The memory array includes a number of scalable magnetoresistive memory devices. For simplicity, we will look at how the writing method applies to a single MRAM device, but it will be understood that the writing method applies to any number of MRAM devices.
The MRAM device used to illustrate the writing method includes a word line and a digit line positioned adjacent to a magnetoresistive memory element. The magnetoresistive memory element includes a pinned magnetic region positioned adjacent to the digit line. A tunneling barrier is positioned on the pinned magnetic region. A free magnetic region is then positioned on the tunneling barrier and adjacent to the word line. In the preferred embodiment, the pinned magnetic region has a resultant magnetic moment vector that is fixed in a preferred direction. Also, in the preferred embodiment, the free magnetic region includes synthetic anti-ferromagnetic (hereinafter referred to as “SAF”) layer material. The synthetic anti-ferromagnetic layer material includes N anti-ferromagnetically coupled layers of a ferromagnetic material, where N is a whole number greater than or equal to two. The N layers define a magnetic switching volume that can be adjusted by changing N. In the preferred embodiment, the N ferromagnetic layers are anti-ferromagnetically coupled by sandwiching an anti-ferromagnetic coupling spacer layer between each adjacent ferromagnetic layer. Further, each N layer has a moment adjusted to provide an optimized writing mode.
In the preferred embodiment, N is equal to two so that the synthetic anti-ferromagnetic layer material is a tri-layer structure of a ferromagnetic layer/anti-ferromagnetic coupling spacer layer/ferromagnetic layer. The two ferromagnetic layers in the tri-layer structure have magnetic moment vectors M
1
and M
2
, respectively, and the magnetic moment vectors are usually oriented anti-parallel by the coupling of the anti-ferromagnetic coupling spacer layer. Anti-ferromagnetic coupling is also generated by the magnetostatic fields of the layers in the MRAM structure. Therefore, the spacer layer need not necessarily provide any additional antiferromagnetic coupling beyond eliminating the ferromagnetic coupling between the two magnetic layers. More information as to the MRAM device used to illustrate the writing method can be found in a copending U.S. Patent Application entitled “Magnetoresistance Random Access Memory for Improved Scalability” filed of even date herewith, and incorporated herein by reference.
The magnetic moment vectors in the two ferromagnetic layers in the MRAM device can have different thicknesses or material to provide a resultant magnetic moment vector given by &Dgr;M=(M
2
−M
1
) and a sub-layer moment fractional balance ratio,
M
br
=
(
M
2
-
M
1
)
(
M
2
+
M
1
)
=
Δ



M
M
total
.
The resultant magnetic moment vector of the tri-layer structure is free to rotate with an applied magnetic field. In zero field the resultant magnetic moment vector will be stable in a direction, determined by the magnetic anisotropy, that is either parallel or anti-parallel with respect to the resultant magnetic moment vector of the pinned reference layer. It will be understood that the term “resultant magnetic moment vector” is used only for purposes of this description and for the case of totally balanced moments, the resultant magnetic moment vector can be zero in the absence of a magnetic field. As described below, only the sub-layer magnetic moment vectors adjacent to the tunnel barrier determine the state of the memory.
The current through the MRAM device depends on the tunneling magnetoresistance, which is governed by the relative orientation of the magnetic moment vectors of the free and pinned layers directly adjacent to the tunneling barrier. If the magnetic moment vectors are parallel, then the MRAM device resistance is

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