Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2007-08-14
2007-08-14
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S100000, C711S154000
Reexamination Certificate
active
10788336
ABSTRACT:
Data transferred from a host computer to a memory device is written into sectors whose addresses in a memory area are decoded by a decode table. Old data to be updated by the above data is erased or marked with erase flags. At a predetermined point of time, in order to create free areas, necessary data is evacuated to a primary memory media and unnecessary data indicated by erase flags is erased by a unit of predetermined memory size. Part of the memory media which has become defective is marked with a defect flag, and is replaced by an alternate area. In doing so, the decode table is rewritten to arrange the memory area.
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U.S. Appl. No. 10/785,010, filed Feb. 25, 2004, Shinpei Komatsu et al., Fujitsu Limited.
Hayashi Tomohiro
Ishii Yumi
Itoh Hiroyuki
Komatsu Shinpei
Shibazaki Shogo
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