Method of writing data to a single transistor type ferroelectric

Static information storage and retrieval – Systems using particular element – Ferroelectric

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257295, G11C 1122

Patent

active

058222391

ABSTRACT:
The invention is directed to a writing method to effectively suppress inter-cell interference when writing data to a single transistor type ferroelectric memory. When V is a writing voltage, stripe-like conducting electrodes are row electrodes, and semiconductor stripes are column electrodes, then the writing method includes a first procedure and a successive second procedure based on V/3 rule. In the first procedure, when a voltage of +V is applied to the row electrode of the cell being observed, while a voltage of zero is applied to the column electrode, and voltages of +V/3 are applied to the other row electrodes, and voltages of +(2/3)V are applied to the other column electrodes, then in the second procedure, a voltage of zero is applied to the row electrode of the cell being observed, while a voltage of +V/3 is applied to the column electrode, and voltages of +V/3 are applied to the other row electrodes, and voltages of zero are applied to the other column electrodes. In the first procedure, when a voltage of -V is applied to the row electrode of the cell being observed, while a voltage of zero is applied to the column electrode, and voltages of -V/3 are applied to the other row electrodes, and voltages of -(2/3)/V are applied to the other column electrodes, then in the second procedure, a voltage of zero is applied to the row electrode of the cell being observed, while a voltage of -V/3 is applied to the column electrode, and voltages of -V/3 are applied to the other row electrodes, and voltages of zero are applied to the other column electrodes.

REFERENCES:
patent: 5666305 (1997-09-01), Mihara et al.

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