Method of writing a four-transistor memory cell array

Details Method of writing a four-transistor memory cell array Method of writing a four-transistor memory cell array

2002-01-31

2003-09-16

Hoang, Huan (Department: 2818)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000

Reexamination Certificate

active

06621728

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to CMOS integrated circuits and more particularly to circuits for storing digital data.
SUMMARY OF THE INVENTION
A pair of cross-coupled inverters that hold a digital state are powered by supplies that also function as row select and column bit lines. A first voltage differential between a pair of supply lines for the rows and a second voltage differential between a pair of supply lines for the columns are applied simultaneously to change the state of the cell.


REFERENCES:
patent: 6552924 (2003-04-01), Brooks et al.
patent: 2002/0131294 (2002-09-01), Forbes

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