Method of wafer-level packaging using low-aspect ratio...

Details Method of wafer-level packaging using low-aspect ratio... Method of wafer-level packaging using low-aspect ratio...

2006-08-16

2009-02-24

Hollington, Jermele M (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

Reexamination Certificate

active

07495462

ABSTRACT:
A wafer-level packaged IC is made by attaching a cap wafer to the front of an IC base wafer before cutting the IC base wafer, i.e. before singulating the plurality of dies on the IC base wafer. The cap wafer is mechanically attached and electrically connected to the IC base wafer, then the dies are singulated. Electrically conductive paths extend through the cap wafer, between wafer contact pads on the front surface of the cap and electrical contact points on the IC base wafer. Optionally, the cap wafer contains one or more dies. The IC base wafer can be fabricated according to a different technology than the cap wafer, thereby forming a hybrid wafer-level package. Optionally, additional “upper-level” cap wafers (with or without dies) can be stacked to form a “multi-story” IC. Optionally, a hermetically-sealed cavity headroom is provided.

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