Method of verifying programming operation of flash memory...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185240, C365S185250

Reexamination Certificate

active

07907454

ABSTRACT:
A method is provided for verifying a programming operation of a flash memory device. The flash memory device includes at least one memory string in which a string selection transistor, multiple memory cells and a ground selection transistor are connected in series, and the programming operation is performed with respect to a selected memory cell in the memory string. The method includes applying a voltage, obtained by adding a threshold voltage of the string selection transistor to a power supply voltage, to a string selection line connected to the string selection transistor; applying a ground voltage to wordlines connected to each of the memory cells and a ground selection line connected to the ground selection transistor; precharging a bitline connected to the memory string to the power supply voltage; and determining whether a programming operation of the selected memory cell is complete.

REFERENCES:
patent: 6857585 (2005-02-01), Winner
patent: 7266016 (2007-09-01), Kameda
patent: 7372742 (2008-05-01), Aritome
patent: 2008/0062760 (2008-03-01), Kim
patent: 2006-146989 (2006-06-01), None
patent: 1020070033667 (2007-03-01), None

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