Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-03-21
2006-03-21
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07017130
ABSTRACT:
A method and verification of estimating crosstalk noise in coupled RLC interconnects with distributed line in nanometer integrated circuits is provided. In this invention, nanometer VLSI interconnects are modeled as distributed RLC coupled trees. The efficiency and the accuracy of moment computation of distributed lines can be shown that outperform those of lumped ones. The inductive crosstalk noise waveform can be accurately estimated in an efficient manner using the linear time moment computation technique in conjunction with the projection-based order reduction method. Recursive formulas of moment computations for coupled RC trees are derived with considering both self inductances and mutual inductances. Also, analytical formulas of voltage moments at each node will be derived explicitly. These formulas can be efficiently implemented for crosstalk estimations.
REFERENCES:
patent: 5481695 (1996-01-01), Purks
patent: 5535133 (1996-07-01), Petschauer et al.
patent: 5555506 (1996-09-01), Petschauer et al.
patent: 5568395 (1996-10-01), Huang
patent: 5596506 (1997-01-01), Petschauer et al.
patent: 6018623 (2000-01-01), Chang et al.
patent: 6029117 (2000-02-01), Devgan
patent: 6405348 (2002-06-01), Fallah-Tehrani et al.
patent: 6434729 (2002-08-01), Alpert et al.
patent: 6732065 (2004-05-01), Muddu
patent: 2003/0115563 (2003-06-01), Chen
patent: 2003/0237070 (2003-12-01), Tomita et al.
patent: 2005/0060674 (2005-03-01), Roethig
patent: 2005/0060675 (2005-03-01), Tetelbaum
Lee,H-J et al. , “Crosstalk Estimation in High-Speed VLSI Interconnect using Coupled RLC—Tree Models”, APCCAS '02, 2002 Asia-Pacific Conference on Circuits and Systems, vol. 1, Oct. 28-31, 2002, pp. 257-262.
Lee, H-J et al., “Moment Computations of Nonuniform Distributed Coupled RLC trees with Estimating Crosstalk Noise”, Proceedings, 5thInternational Symposium on Quality Electronic Design, 2004, pp. 75-80.
Davis, J.A et al. “Compact Distributed RLC Models for Multilevel Interconnect Networks” 1999 Digest of Technical Papers, Syposium on VLSI circuits, Jun. 17-19, 1999, pp. 167-168.
Cao. Y, et al, “A New Analytical Delay and Noise Model for On-Chip RLC Interconnect” International Electron Devices Meeting, IEDM Technical Digest, Dec. 10-13, 2000, pp. 823-826.
Chu Chia-Chi
Feng Wu-Shiung
Lai Ming-Hong
Lee Herng-Jer
Chang Gung University
Dimyan Magid Y.
Kamrath Alan D.
Nikolai & Mersereau , P.A.
Whitmore Stacy A.
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