Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1996-02-27
1998-03-17
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Bad bit
3652257, 365201, G11C 2900
Patent
active
057294976
ABSTRACT:
A method of using non-data bits of the memory device as data bits is comprised of the steps of determining which bits in the memory device are nonfunctional and which bits are functional. If any of the data bits is nonfunctional, the second step of the method is to connect a non-data bit to a data bit line. The second step may be carried out while the memory device is being bonded to a lead frame or during the external routing of the output pads of the memory device on a printed circuit board. The method of the present invention may also be carried out by providing a plurality of fusible links between the memory cells of the memory device and the memory devices output pads. The fusible links may be opened in a manner so that each output pad is connected to a functional bit.
REFERENCES:
patent: 5228132 (1993-07-01), Neal et al.
patent: 5287311 (1994-02-01), Tso et al.
patent: 5557573 (1996-09-01), McClure
Blanchard et al., "Automatic RAM Repair of Single bit Hard Errors Using Spare Bits", IBM Technical Disclosure Bulletin, vol. 27 No. 1A, pp. 363-364, Jun. 1984.
Hoang Huan
Micro)n Technology, Inc.
Nelms David C.
LandOfFree
Method of using parity and ECC bits to increase the yield of non does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of using parity and ECC bits to increase the yield of non, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of using parity and ECC bits to increase the yield of non will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-964273