Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
1999-11-08
2001-06-05
Utech, Benjamin L. (Department: 1765)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S758000, C257S761000, C257S762000, C257S774000, C438S690000, C438S691000, C438S692000, C438S700000
Reexamination Certificate
active
06242805
ABSTRACT:
TECHNICAL FIELD
The field of the present invention pertains to semiconductor fabrication processes. More particularly, the present invention relates to the field of chemical mechanical polishing of metal lines in a semiconductor wafer.
BACKGROUND ART
Most of the power and usefulness of today's digital integrated circuit (IC) devices can be attributed to the increasing levels of integration. More and more components (resistors, diodes, transistors, and the like) are continually being integrated into the underlying chip, or IC. The starting material for typical ICs is very high purity silicon. The material is grown as a single crystal. It takes the shape of a solid cylinder. This crystal is then sawed (like a slice of bread) to produce wafers typically 10 to 30 cm in diameter and 250 microns thick.
The geometry of the features of the IC components is commonly defined photographically through a process known as photolithography. Very fine surface geometry can be reproduced accurately by this technique. The photolithography process is used to define component regions and build up components one layer on top of another. Complex ICs can often have many different built up layers, each layer having components, each layer having differing interconnections, and each layer stacked on top of the previous layer. The resulting topography of these complex IC's often resemble familiar terrestrial “mountain ranges,” with many “hills” and “valleys” as the IC components are built up on the underlying surface of the silicon wafer.
In the photolithography process, a mask image, or pattern, defining the various components, is focused onto a photosensitive layer using incident light. The image is focused onto the surface using the optical means of the photolithography tool, and is imprinted into the photosensitive layer. To build ever-smaller features, increasingly fine images must be focused onto the surface of the photosensitive layer, i.e. optical resolution must increase. As optical resolution increases, the depth of focus of the mask image correspondingly narrows. This is due to the narrow range in depth of focus imposed by the high numerical aperture lenses in the photolithography tool. This narrowing depth of focus is often the limiting factor in the degree of resolution obtainable, and thus, the smallest components obtainable using the photolithography tool. The extreme topography of complex ICs, the “hills” and “valleys,” exaggerate the effects of decreasing depth of focus. Thus, in order to properly focus the mask image defining sub-micron geometries onto the photosensitive layer, a precisely flat surface is desired. The precisely flat (i.e., fully planarized) surface will allow for extremely small depths of focus, and in turn, allow the definition and subsequent fabrication of extremely small components.
Chemical mechanical polishing (CMP) is a preferred method of obtaining full planarization of a semiconductor wafer. It involves removing a sacrificial layer of dielectric material using mechanical contact between the wafer and a moving polishing pad saturated with slurry. Polishing flattens out height differences, since high areas of topography (hills) are removed faster than areas of low topography (valleys). Polishing is the only technique with the capability of smoothing out topography over millimeter scale planarization distances leading to maximum angles of much less than one degree after polishing.
FIG. 1
is a top view of a chemical mechanical polishing (CMP) machine
100
and
FIG. 2
is a side view of CMP machine
100
. CMP machine
100
is fed semiconductor wafers to be polished. CMP machine
100
picks up the wafers with an arm
101
and places them onto a rotating polishing pad
102
. Polishing pad
102
is made of a resilient material and is textured, often with a plurality of predetermined grooves
103
, to aid the polishing process. Polishing pad
102
rotates on a platen
104
, or turntable located beneath polishing pad
102
, at a predetermined speed. A wafer
105
is held in place on polishing pad
102
within a carrier ring
112
that is connected to a carrier film
106
of arm
101
. The front surface of wafer
105
rests against polishing pad
102
. The back surface of wafer
105
is against the lower surface of carrier film
106
of arm
101
. As polishing pad
102
rotates, arm
101
rotates wafer
105
at a predetermined rate. Arm
101
forces wafer
105
into polishing pad
102
with a predetermined amount of down force. CMP machine
100
also includes a slurry dispense arm
107
extending across the radius of polishing pad
102
, which dispenses a flow of slurry onto polishing pad
102
.
The slurry is a mixture of deionized water and polishing agents designed to chemically aid the smooth and predictable planarization of wafer
105
. The rotating action of both polishing pad
102
and wafer
105
, in conjunction with the polishing action of the slurry, combine to planarize, or polish, wafer
105
at some nominal rate. This rate is referred to as the removal rate. A constant and predictable removal rate is important to the uniformity and throughput performance of the wafer fabrication process. The removal rate should be expedient, yet yield precisely planarized wafers, free from surface anomalies. If the removal rate is too slow, the number of planarized wafers produced in a given period of time decreases, hurting wafer throughput of the fabrication process. If the removal rate is too fast, the CMP planarization process will not be consistent across several wafers in a batch, thereby hurting the consistency of the fabrication process.
To aid in maintaining a stable removal rate, CMP machine
100
includes a conditioner assembly
120
. Conditioner assembly
120
includes a conditioner arm
108
, which extends across the radius of polishing pad
102
. An end effector
109
is connected to conditioner arm
108
. End effector
109
includes an abrasive conditioning disk
110
that is used to roughen the surface of polishing pad
102
. Conditioning disk
110
is rotated by conditioner arm
108
and is transitionally moved towards the center of the polishing pad
102
and away from the center of polishing pad
102
, such that conditioning disk
110
covers the radius of polishing pad
102
. In so doing, conditioning disk
110
covers the surface area of polishing pad
102
, as polishing pad
102
rotates. A polishing pad having a roughened surface has an increased number of micro-pits and gouges in its surface from conditioner assembly
120
and therefore produces a faster removal rate via increased slurry transfer to the surface of wafer
105
. Without conditioning, the surface of polishing pad
102
is smoothed during the polishing process and removal rate decreases dramatically. Conditioner assembly
120
re-roughens the surface of polishing pad
102
, thereby improving the transport of slurry and improving the removal rate.
As described above, the CMP process uses abrasive slurry on a polishing pad. The polishing action of the slurry is comprised of an abrasive frictional component and a chemical component. The abrasive frictional component is due to the friction between the surface of the polishing pad, the surface of the wafer, and the abrasive particles suspended in the slurry. The chemical component is due to the presence in the slurry of polishing agents that chemically interact with the material of the dielectric layer of wafer
105
. The chemical component of the slurry is used to soften the surface of the dielectric layer to be polished, while the frictional component removes material from the surface of wafer
105
.
Referring still to
FIGS. 1 and 2
, the polishing action of the slurry determines the removal rate and removal rate uniformity, and thus, the effectiveness of the CMP process. As slurry is “consumed” in the polishing process, the transport of fresh slurry to the surface of wafer
105
and the removal of polishing by-products away from the surface of wafer
105
becomes very important in maintaining the removal rate. Slurry transport is
Tran Binh X.
Utech Benjamin L.
VLSI Technology Inc.
Wagner , Murabito & Hao LLP
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