Method of updating IC instruction and data cache

Details Method of updating IC instruction and data cache Method of updating IC instruction and data cache

2009-04-13

2010-12-07

Thai, Tuan V (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

Reexamination Certificate

active

07849268

ABSTRACT:
A method of updating a cache in an integrated circuit is provided. The integrated circuit incorporates the cache, memory and a memory interface connected to the cache and memory. Following a cache miss, the method fetches, using the memory interface, first data associated with the cache miss and second data from the memory, where the second data is stored in the memory adjacent the first data, and updates the cache with the fetched first and second data via the memory interface. The cache includes instruction and data cache, the method performing arbitration between instruction cache misses and data cache misses such that the fetching and updating are performed for data cache misses before instruction cache misses.

REFERENCES:
patent: 4932232 (1990-06-01), Ballyns et al.
patent: 5822758 (1998-10-01), Loper et al.
patent: 6145054 (2000-11-01), Mehrotra et al.
patent: 6283572 (2001-09-01), Kumar et al.
patent: 6354689 (2002-03-01), Couwenhoven et al.
patent: 2002/0060707 (2002-05-01), Yu et al.
patent: 2004/0064649 (2004-04-01), Volpe et al.
patent: 2005/0120270 (2005-06-01), Anand et al.

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