Method of topside and inter-metal oxide coating

Details Method of topside and inter-metal oxide coating Method of topside and inter-metal oxide coating

1995-12-05

1998-08-04

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438626, 438631, 438639, 438668, 438778, 438945, H01L 214763

Patent

active

057893144

ABSTRACT:
A method is provided for suppressing or eliminating void formation during the manufacture of integrated circuits. TEOS is deposited and etched to form recesses that assist in eliminating or suppressing void formation. The recesses may be located in an interlevel layer, or within the oxide layer just beneath the passivation layer.

REFERENCES:
patent: 5001079 (1991-03-01), Van Laarhoven et al.
patent: 5278103 (1994-01-01), Mallon et al.
patent: 5296092 (1994-03-01), Kim
patent: 5302233 (1994-04-01), Kim
patent: 5382547 (1995-01-01), Sultan et al.
patent: 5393708 (1995-02-01), Hsia et al.
patent: 5508233 (1996-04-01), Yost et al.
patent: 5591677 (1997-01-01), Jeng

Affiliated with

Also associated with

Rating

Method of topside and inter-metal oxide coating does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of topside and inter-metal oxide coating, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of topside and inter-metal oxide coating will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1176716