Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-12-04
2007-12-04
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C700S097000, C700S121000
Reexamination Certificate
active
11100039
ABSTRACT:
The present invention provides a method for tiling an integrated circuit having a critically matched device such as a transistor. The method obtains an advantage of automatically improving metallic density over critically matched devices thus yielding improved CMP. The method may include the steps of: identifying critically matched devices in the integrated circuit; placing metal tiles over the critically matched device; performing a density test around each critically matched device; and if a density test is not satisfied around a critically matched device, placing at least one metal strip over a critically matched device.
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Drennan Patrick G.
Garrity Douglas A.
LoCascio David R.
McClellan James F.
McGowan Michael J.
Freescale Semiconductor Inc.
Ingrassia Fisher & Lorenz P.C.
Kik Phallaka
Sandoval Patrick
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