Method of testing single-order address memory

Details Method of testing single-order address memory Method of testing single-order address memory

1996-05-17

1998-01-06

Canney, Vincent P.

Excavating

371 251, G06F 1100

Patent

active

057062935

ABSTRACT:
The present invention provides a test method of SOA (Single-Order Addressed) memory utilizing address data backgrounds applied to memory circuits. A memory test operation is performed using a total of (log.sub.2 N+1) address data backgrounds on an SOA memory having N mutually different addresses. Each address data background is written and read, then the inversion is written and read. Finally the address data background is again written and read for a total of 6 N(log.sub.2 N+1) operations.

REFERENCES:
patent: 5258986 (1993-11-01), Zerbe
patent: 5502814 (1996-03-01), Yuuki et al.
patent: 5513318 (1996-04-01), Van de Goor et al.

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