Method of testing bit errors in ISDN circuits

Details Method of testing bit errors in ISDN circuits Method of testing bit errors in ISDN circuits

1989-12-21

1992-03-24

Beausoliel, Robert W.

Excavating

370 13, G06F 1100

Patent

active

050994808

ABSTRACT:
A method of testing bit errors in an ISDN circuit by employing a tester having the function of a terminal and by using the information channels of the frame of an ISDN. The tester sends out a known data pattern generated by a pattern generator to the ISDN by a sending circuit, receives the data pattern transmitted through the ISDN by a receiving circuit, and compares the known data pattern generated by the pattern generator and the received pattern data to detect errors in the circuit of ISDN. The method is capable of detecting errors in the circuit and confirming the quality of the circuit and the operating condition of the ISDN without requiring any additional special function of the circuit and without disturbing the communication of terminals connected to the ISDN.

REFERENCES:
patent: 3069498 (1962-12-01), Frank
patent: 3380023 (1968-04-01), Magnuski
patent: 3562710 (1971-02-01), Halleck
patent: 4156110 (1979-05-01), Keeney
patent: 4730313 (1988-03-01), Stephenson
patent: 4922482 (1990-05-01), Tanahashi
patent: 4989202 (1991-01-01), Soto
patent: 4999836 (1991-03-01), Fujiwara

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