Method of testing a cache tag memory array

Details Method of testing a cache tag memory array Method of testing a cache tag memory array

1995-07-31

1998-03-17

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711118, G06F 1122

Patent

active

057296774

ABSTRACT:
Content testing (302-306) and comparator testing (312-326) of a tag section (24, 26) of a cache tag memory array is performed to confirm that the tag section (24, 26) is functional. For content testing (302-306), each tag location is tested once. Comparator testing (312-326) is performed to determine the functionality of the comparator (240, 260) of the cache tag memory array. The number of tests performed for the comparator testing is 2.times.M+2, where M is the number of bit positions in the tag location. Two of the tests are for testing the comparator's ability to identify correctly hits within the tag section (312-316). The other tests are for testing the comparator's ability to identify correctly misses within the tag section at each bit position of the tag locations (322-326).

REFERENCES:
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patent: 4740971 (1988-04-01), Tam et al.
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patent: 5043943 (1991-08-01), Crisp et al.
patent: 5195096 (1993-03-01), Moore
patent: 5249281 (1993-09-01), Fuccio et al.
Dekker, et al.; "Fault Modeling and Test Algorithm Development for Static Random Access Memories;" 1988 IEEE Internat'l Test Conf.; Ch. 2610; Paper 20.1; pp. 343-352 (1988).
Dekker, et al.; "A Realistic Self-Test Machine for Static Random Access Memories;" 1988 IEEE Internat'l Test Conf.; Ch. 2610; Paper 20.2; pp. 353-361 (1988).

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