Method of simultaneously displaying schematic and timing data

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000

Reexamination Certificate

active

06964028

ABSTRACT:
A method, and a corresponding data structure, are used for designing a circuit by displaying signal information on a schematic diagram of the circuit to aid in resolving design problems. A circuit design is stored as data in a computer memory. An E-CAD tool software application is performed on the design to create an archive file containing x-y display coordinates for displaying the signals as part of a schematic. The archive file contains names and locations of all signals. The design is analyzed to extract signal information. Timing information may be extracted using a timing analyzer. The information is stored in a data file, such as a timing data file in the computer memory. Timing information and signal display coordinate information may be combined into a new archive file that is used to create a schematic diagram of the circuit, or a portion of the circuit, in which the timing information is displayed near the signals and signal names. Based on the displayed timing information, the designer can identify and attempt to resolve problem signals in the design.

REFERENCES:
patent: 4855726 (1989-08-01), Nishio
patent: 5568397 (1996-10-01), Yamashita et al.
patent: 6442741 (2002-08-01), Schultz
patent: 6564365 (2003-05-01), Argyres
patent: 6587999 (2003-07-01), Chen et al.
patent: 6701505 (2004-03-01), Srinivasan

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