Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Reexamination Certificate
1999-11-23
2001-06-26
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
C424S435000, C424S637000
Reexamination Certificate
active
06251753
ABSTRACT:
FIELD OF THE INVENTION
The present invention is related to an interlayer dielectric with a low dielectric constant (k) for reducing the parasitic capacitance between metal interconnection lines such as Cu damascene, and in particular to a method for capping sidewalls of damascene trenches of the interlayer dielectric to protect the interlayer dielectric from ashing-induced degradation.
BACKGROUND OF THE INVENTION
As device geometry is scaled down to deep submicron region, the parasitic capacitance between closely spaced metal lines becomes important in terms of the resistance-capacitance time delay for device switching [M. T. Bohr, in
Tech. Dig. IEEE Int. Electron Devices Meet.,
241 (1995)]. A novel interlevel dielectric (ILD) with a low dielectric constant (k) is thus required to reduce the parasitic capacitance. Spin-on coated methylsilsesquioxane (MSQ) is very promising as a novel ILD, due to its low k value (~2.8) and superior thermal stability (~500° C.). However, the MSQ film can be degraded in the resist ashing step after damascene trenches of the film are patterned using dry etching [J. Waeterloos, H. Meynen, B. Coenegrachts, S. Vanhaelemeersch, J. Grillaert, and L. Van den hove, in
Advanced Metallization and Interconnect Systems for ULSI Applications in
1995, R. C. Ellwanger and S. Q. Wang, Editors, p.75 (1996); J. J. Yang, S. Q. Wang, L. Forester, and M. Ross, in
Advanced Metallization for ULSI Application in
1997, R. Cheung, J. Klein, K. Tsubouchi, M. Marakami, and N. Kobayashi, Editors, p. 359 (1997)]. The degraded MSQ film can easily become hygroscopic, and seriously lose its benefit of having low k. Therefore, ashing-induced degradation becomes an important issue in terms of applying MSQ film as an option for damascene integration.
A primary object of the present invention is to provide a method to improve the drawback of the prior art.
SUMMARY OF THE INVENTION
A low dielectric constant (k) material, such as methylsilsesquioxane (MSQ), used as an interlevel dielectric is expected to reduce the parasitic capacitance in integrated circuit. However, MSQ film can be easily degraded during resist ashing after damascene trenches of the MSQ film is created with lithography and dry etching. In the present invention, an innovative sidewall capping technology is developed to solve the degradation issue. Prior to resist ashing, a high-quality, low-k oxide film is selectively deposited onto the sidewalls of MSQ trenches using selective liquid-phase deposition. Experimental results demonstrate that the capping oxide can effectively protect the sidewalls of MSQ trenches from ashing-induced degradation.
A method of forming a trench, a via or a contact hole in a dielectric layer on a substrate with a capping layer thereon accomplished according to the innovative sidewall capping technology of the present invention comprises the following steps:
(a) forming a dielectric layer on a substrate, preferably the dielectric layer being a low dielectric constant dielectric having a dielectric constant lower than 3.0, such as methylsilsesquioxane;
(b) forming a photoresist layer on the dielectric layer;
(c) forming a trench, a via or a contact hole in said dielectric layer by photolithography, wherein the photoresist is patterned and the dielectric layer is etched by using the patterned photoresist as a mask;
(d) forming a capping layer on side walls of said trench, said via or said contact hole and substantially not on the patterned photoresist by a selective liquid phase deposition of silicon dioxide; and
(e) stripping said patterned photoresist.
In the method of the present invention, the dielectric layer will become more hygroscopic when it is subjected to the stripping in step (e).
In step (e) of the method of the present invention, the stripping may be carried out by ozone ashing.
In the method of the present invention, the capping layer formed in step (d) preferably has a dielectric constant dielectric lower than 3.9, and more preferably lower than 3.5.
A suitable process for carrying out the selective liquid phase deposition of silicon dioxide in step (d) comprises immersing the substrate from step (c) in a silica-supersaturated solution, wherein the silica-supersaturated solution is prepared by increasing a temperature of a silica-saturated hydrofluosilicic acid (H
2
SiF
6
) solution containing 0.5-5.0 M concentration of hydrofluosilicic acid by about 10° C. Preferably, the silica-saturated hydrofluosilicic acid solution is prepared at 0° C. and the silica-supersaturated solution is prepared by raising the 0° C. silica-saturated hydrofluosilicic acid solution to about 25° C.
Preferably, the method of the present invention further comprises (a′) forming a nitride layer on said dielectric layer prior to step (b), wherein the nitride layer is etched together with the dielectric layer in step (c) by using the patterned photoresist as a mask. More preferably, the method of the present invention further comprises (d′) selectively removing a bottom capping layer formed at a bottom of said trench during step (d) by anisotropic etching prior to step (e), wherein the nitride film on said trench remains intact.
Preferably, the method of the present invention further comprises (c′) leaning side walls of said trench, said via or said contact hole prior to step (d) by etching.
REFERENCES:
patent: 5445989 (1995-08-01), Lur et al.
patent: 5453395 (1995-09-01), Lur
patent: 5472898 (1995-12-01), Hong et al.
patent: 5786263 (1998-07-01), Perera
patent: 5801082 (1998-09-01), Tseng
patent: 5801083 (1998-09-01), Yu et al.
patent: 6156671 (2000-12-01), Chang et al.
Lee Yueh-Chuan
Su Yuh-Ching
Wu Kwo-Hau
Yeh Ching-Fa
Blum David S.
Bowers Charles
Lowe Hauptman & Gilman & Berner LLP
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