Method of shortening boot uptime in a computer system

Details Method of shortening boot uptime in a computer system Method of shortening boot uptime in a computer system

1998-03-20

2000-09-19

Lee, Thomas C.

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral configuration

710 8, 710 9, 710 46, 710109, 713 1, 713 2, 713100, G06F 9445, G06F 1300

Patent

active

061226777

ABSTRACT:
A method of configuring peer devices without the unnecessary delay in boot up time using a compatibility bridge. Upon initiating a configuration cycle, a BIOS initialization scans all peer devices located on the host bus. A watchdog timer times out after a predetermined duration when the intended device fails to respond to the configuration cycle. A bit corresponding to the particular device is set in a scorecard register. The compatibility bridge responds to the configuration cycle after the watchdog time-out period.

REFERENCES:
patent: 5379384 (1995-01-01), Solomon
patent: 5542055 (1996-07-01), Amini et al.
patent: 5568619 (1996-10-01), Blackledge et al.
patent: 5675794 (1997-10-01), Meredith
patent: 5761448 (1998-06-01), Adamson et al.
patent: 5850397 (1998-12-01), Raab et al.
patent: 5864698 (1999-01-01), Krau et al.
patent: 5904733 (1999-05-01), Jayakumar
patent: 5933609 (1999-08-01), Walker et al.
patent: 5935226 (1999-08-01), Klein
patent: 5935242 (1999-08-01), Madany et al.

Affiliated with

Also associated with

Rating

Method of shortening boot uptime in a computer system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of shortening boot uptime in a computer system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of shortening boot uptime in a computer system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1083738