Method of self-aligning a trench isolation structure to an impla

Details Method of self-aligning a trench isolation structure to an impla Method of self-aligning a trench isolation structure to an impla

1987-04-30

1989-01-24

Schor, Kenneth M.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156643, 156648, 437 20, 437 67, 437228, 437984, H01L 21265, H01L 21308

Patent

active

047999900

ABSTRACT:
A method for self-aligning an isolation structure to a diffusion region. A first masking layer is formed on a semiconductor substrate, the first masking layer having at least one aperture sidewall which is substantially perpendicular to the semiconductor substrate. Dopant ions are implanted into the semiconductor substrate through the first masking layer to form a doped region. Sidewall spacers are then defined on the sidewalls of the aperture, and a sidewall image reversal process is carried out such that the sidewall spacers define trench apertures in a masking structure. Finally, isolation trenches are etched into the semiconductor substrate through the masking structure. Alternatively, the implantation step is carried out after the sidewall spacers are defined on the first masking layer.

REFERENCES:
patent: 4333794 (1982-06-01), Beyer et al.
patent: 4366613 (1983-01-01), Ogura et al.
patent: 4463493 (1984-08-01), Momose
patent: 4465532 (1984-08-01), Fukano
patent: 4478655 (1984-10-01), Nagakubo et al.
patent: 4502914 (1985-03-01), Trumpp et al.
patent: 4551911 (1985-11-01), Sasaki et al.
patent: 4650544 (1987-03-01), Erb et al.
R. D. Rung; "Trench Isolation Prospects for Application in CMOS VLSI", International Electron Devices Meeting Technical Digest, Dec. 1984, pp. 574-577.

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