Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-08-06
2004-01-13
Fahmy, Wael (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S717000, C438S738000
Reexamination Certificate
active
06677234
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a method of selectively forming silicide comprising the steps of:
providing a body with silicon regions,
applying a mask layer that covers a part of the silicon regions,
applying a suitable material capable of silicide-formation, and
forming silicide by inducing a reaction between said material and silicon of the uncovered silicon regions.
The invention further relates to a method for manufacturing a semiconductor device comprising the steps of:
providing a body in which electronic elements can be formed,
providing silicon regions for interconnecting the electronic elements,
applying a mask layer that covers a part of the silicon regions,
applying a suitable material capable of silicide-formation, and
forming silicide by inducing a reaction between said material and uncovered silicon.
Such methods are known from JP-A-07161949. In the known method, a semiconductor body with exposed silicon regions is covered with an oxide film. A patterned resist layer is applied and the oxide film is locally removed. A high melting point metal is applied and silicide is formed at the location where the oxide film was locally removed.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a method of selective by forming silicide which results in a reduced resistance of the silicide compared to the known method.
The methods according to the invention are characterized in that the mask layer is formed by
applying a first layer of a first material,
applying a second layer of a second material,
applying a patterned resist layer,
etching the second layer by means of a first etch process using the patterned resist layer as a mask, and
etching the first layer using the second layer as a mask by means of a second etch process that is highly selective with respect to the silicon regions.
It has been found that due to these measures the resistance of the silicide is less than that of silicide formed with the known method. It is believed that this can be attributed to the following reasons. In the known process, the silicon surface is probably damaged and/or contaminated so that the formation of silicide is hampered and the resistance of the silicide is negatively affected. In the method according to the invention the silicon is treated very gently and the formation of silicide is hardly affected by the patterning of the mask layer. It has further been found that the method according to the invention meets other requirements, such as a good definition of the mask layer and an acceptable process time.
Due to the measure as defined in dependent claim 2, the second etch process can be controlled more accurately so that the definition of the mask layer is improved.
Due to the measures as defined in dependent claim 3, the second layer can be etched selectively relative to the first layer by means of commonly used techniques so that the first layer can be relatively thin and hence easily patterned with a good definition.
Due to the measure as defined in dependent claim 4, a very low sheet resistance of the silicide has been obtained.
Due to the measure as defined in dependent claim 5, the silicon is protected by the silicon oxide top layer during deposition and etching of the first layer. Due to this protection, contamination of the silicon is further counteracted. If the top layer has a thickness of less than 20 nm, this top layer will not prevent the formation of silicide. However, it is preferred to remove the top layer before depositing the material capable of silicide-formation. This can, for example, be achieved by immersion in HF.
Due to the measures as defined in dependent claim 8, neither the silicon nor the isolating material under the first layer is affected by the second etch process. Consequently, a low resistance of the silicide is obtained and the isolating trenches remain intact so that the method is applicable for the production of semiconductor devices with very small dimensions.
Due to the measures as defined in dependent claim 9, no traces of the mask layer will remain on side walls of the silicon ridges. Consequently, the contact area between the material capable of silicide formation and the silicon is not reduced due to traces of the mask so that the formation of silicide is not hampered by the use of the mask layer.
Due to the measures as defined in dependent claim 10, the spacers are also etched during etching of the first layer. Consequently, a larger part of the side portions of the silicon ridges come into contact with the material capable of silicide-formation so that the silicide formation is improved and the resistance of the ridges is decreased.
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Wolf, Stanley. Silicon Processing for the VLSI Era, vol. 2: Process Integration. Lattice Press, 1990. pp. 45-50.
De Coster Walter J. A.
Gerritsen Eric
Guelen Josephus F. A. M.
Bartle Ernestine C.
Fahmy Wael
Koninklijke Philips Electronics , N.V.
Peralta Ginette
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