Method of selectively etching HSG layer in deep trench...

Details Method of selectively etching HSG layer in deep trench... Method of selectively etching HSG layer in deep trench...

2006-09-26

2006-09-26

Smith, Bradley K. (Department: 2891)

Semiconductor device manufacturing: process

Making passive device

Trench capacitor

C438S243000, C257SE21012

Reexamination Certificate

active

07112505

ABSTRACT:
The invention provides a method of selectively etching a Hemispherical Silicon Grain (HSG) layer during deep trench capacitor fabrication. A substrate having a pad structure and a deep trench is provided. A buried oxide layer is formed on the upper sidewall of the deep trench and a HSG layer and an ASG layer are formed in the deep trench sequentially. A mask layer is filled into the deep trench and recessed; the exposed ASG layer is then removed. The HSG layer is doped to form a plasma doping layer on the upper portion of the deep trench, which is removed without damaging the silicon substrate. After the mask layer is removed, a cap oxide layer is formed on the deep trench, and the substrate is subjected to a thermal treatment to form a buried plate.

REFERENCES:
patent: 4681657 (1987-07-01), Hwang et al.
patent: 6177696 (2001-01-01), Bronner et al.
patent: 6537872 (2003-03-01), Tsao et al.
patent: 6555430 (2003-04-01), Chudzik et al.
patent: 6639266 (2003-10-01), Yates et al.
patent: 2004/0214391 (2004-10-01), Chen et al.

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