Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2006-12-11
2010-11-23
Le, Thao P. (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S637000, C257SE23145
Reexamination Certificate
active
07838428
ABSTRACT:
When an interconnect structure is built on porous ultra low k (ULK) material, the bottom and/or sidewall of the trench and/or via is usually damaged by a following metallization or cleaning process which may be suitable for dense higher dielectric materials. Embodiments of the present invention may provide a method of repairing process induced dielectric damage from forming an interconnect structure on an inter-layer dielectric (ILD) material. The method includes treating an exposed area of the ILD material to create a carbon-rich area, and metallizing the carbon-rich area. One embodiment includes providing treatment to an exposed sidewall area of the ILD material to create a carbon-rich area by irradiating the exposed area using a gas cluster ion beam (GCIB) generated through a gas including a straight chain or branched, aliphatic or aromatic hydrocarbon, and metallizing the carbon-rich area.
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Chen Shyng-Tsong
Klymko Nancy R.
Madan Anita
Mehta Sanjay
Molis Steven E.
Hoffman Warnick LLC
International Business Machines - Corporation
Le Thao P.
Li Wenjie
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