Method of removing a polysilicon buffer using an etching...

Details Method of removing a polysilicon buffer using an etching... Method of removing a polysilicon buffer using an etching...

1999-03-08

2001-07-03

Picardat, Kevin M. (Department: 2823)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

C438S444000, C438S446000, C438S042000

Reexamination Certificate

active

06255188

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to the manufacturing of integrated circuits, and in particular, to a method of removing a polysilicon buffer using an etching selectivity solution as part of a process of forming a field oxide and an active area.
BACKGROUND OF THE INVENTION
The trend today in the design of integrated circuits is to incorporate more devices within a given real estate. Accordingly, many integrated circuit designers focus their development work on new techniques that would increase the device density of integrated circuits. Many of these techniques are directed at reducing the size of the active area of each of the devices in an integrated circuit. In addition, some of the techniques are directed at reducing the size of the isolation area between adjacent active areas. Both of these efforts are conducted with the goal that the performance or properties of the resulting integrated circuits are not significantly compromised, although the overall size of the integrated circuits is reduced.
FIG. 1A
illustrates a cross-sectional view of a portion of an integrated circuit
10
as typically manufactured in the prior art. The devices (components) of the integrated circuit
10
are typically formed using a substrate
12
. For simplicity, the integrated circuit
10
can be subdivided into two regions. A first region comprises an active area
14
for use in forming the devices that make up the operational aspect of the integrated circuit
10
, as well as a second region that comprises a field oxide
16
that provides isolation between adjacent active areas. The active area
14
typically includes thin-film layers formed on and above the substrate
12
, such as pad oxide layer
18
(e.g. SiO
2
) formed on and above the substrate
12
and silicon nitride layer (Si
3
N
4
)
20
formed on and above the pad oxide layer
18
, as well as ion implanted (doped) regions (not shown) formed within the substrate
12
.
FIG. 1B
illustrates a blow-up view of the interface of the active area
14
and the field oxide
16
of the cross-sectional view of integrated circuit
10
as depicted in FIG.
1
A. The interface of the active area
14
and the field oxide
16
involves the transition
22
of the pad oxide region
18
into the field oxide region
16
. Because the pad oxide
18
is typically thinner than the field oxide
16
, the transition or interface
22
between the pad oxide
18
and the field oxide
16
is typically characterized by a graduated decrease in thickness as it extends from the field oxide
16
to the pad oxide
18
. This transition or interface is typically referred in the relevant art as a “bird's beak”
22
because of its resemblance to the shape of a bird's beak.
As it was previously discussed, the trend today in the design of integrated circuit is to reduce the size of the device active area along with the size of the field oxide to further densify the integrated circuit. Another technique involved is to shorten the transition
22
between the pad oxide
18
and the field oxide
16
, i.e., to shorten the length of the bird's beak
22
. However, shortening the length of the bird's beak
22
may compromise other desirable properties of the integrated circuit
10
. Usually, there is a tradeoff between the desired length of the bird's beak
22
and the desired characteristic of the integrated circuit
10
.
Thus, a compromise needs to be reached as to the length of the bird's beak
22
in order to achieve the desired size requirement for the integrated circuit without significantly affecting the characteristics or performance of the integrated circuit. Prior art techniques have been developed at forming the field oxide and active area in order to achieve the desired bird's beak characteristic.
FIGS. 2A-2C
illustrate cross-sectional views of an integrated circuit
50
at sequential steps of part of a prior art method of forming a field oxide and active area. The part of the prior art method of forming a field oxide and active area described with reference to
FIGS. 2A-2C
relates to the removal of the oxidation mask and polysilicon buffer, after the field oxide is formed. In other words, this part concerns the “clean up” part of the prior art method of forming the field oxide and active area. Accordingly, as illustrated in
FIG. 2A
, the integrated circuit
50
prior to the “clean up” part of the prior art method of forming the field oxide and active area comprises a substrate
52
, a field oxide
54
and an active area
56
. At this stage, the active area
56
includes a pad oxide layer
58
formed on and above the substrate
52
, a polysilicon buffer
60
formed on and above the pad oxide
58
, and a silicon nitride (Si
3
N
4
) oxidation mask
62
formed on and above the polysilicon buffer
60
, Next, we photolithography to define the active area
56
, followed with thermal growth to form the field oxide
54
.
As illustrated in
FIG. 2B
, a first procedure in the “clean up” part of the prior art method of forming the field oxide and active area is to remove the silicon nitride (Si
3
N
4
) oxidation mask
62
and the polysilicon buffer
60
. In the prior art, the removal of the silicon nitride (Si
3
N
4
) oxidation mask
62
and the polysilicon buffer
60
is typically performed by either standard dry or wet etching techniques. However, these techniques can have adverse effects on the field oxide
54
, the pad oxide
58
, and the substrate
52
.
As illustrated in
FIG. 2C
, the removal of the polysilicon buffer
60
, in particular with the use of standard dry etching techniques, can cause the formation of pits
64
within the field oxide
54
, the pad oxide
58
, and the substrate
52
. These pits
64
can result in potential adverse effects on the performance of the integrated circuit
50
. In particular, the pits
23
can increase the leakage current through the field oxide
54
, and therefore, diminish the isolation properties of the field oxide
54
. In addition, the pits
64
can reduce the charge-to-breakdown voltage (Qbd) of the gate oxide. Thus, there is need for a method of forming a field oxide and active area, or a method of removing the polysilicon buffer
60
, without the substantial formation of these pits
64
.
SUMMARY OF THE INVENTION
One aspect of the invention is a method of removing a polysilicon buffer in a process of forming a field oxide and an active area, using an etching selectivity solution. As it was previously discussed, one method of forming a field oxide and an active area involves a “clean up” step after the field oxide has been formed, comprising the steps of removing a silicon nitride (Si
3
N
4
) oxidation mask and a polysilicon buffer, both of which are situated within the active area. The prior art methodology of removing these materials from the active area involved either standard dry or wet etching techniques. However, one drawback of these standard techniques is that pits would typically form within the field oxide, the pad oxide and/or the substrate. Such pits in the field oxide, the pad oxide and/or the substrate have adverse effects on the performance of the devices formed using the prior art methodology, such as for example increased leakage current and a decrease in the charge-to-breakdown Qbd voltage.
The method of removing a polysilicon buffer in a process of forming a field oxide and an active area in accordance with the invention has the advantage of reducing or even eliminating the formation of the pits in the field oxide, the pad oxide and/or the substrate. As a result, integrated circuits and devices formed using the methodology of the invention typically have lower leakage currents and increased charge-to-breakdown Qbd voltages. Accordingly, the integrated circuits and/or devices formed using the methodology of the invention are typically more reliable and have improved performance over those formed using prior art methodology.
Briefly, the method of removing a polysilicon buffer in a process of forming a field oxide and an active area in accordance with the inve

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