Method of regulating a flow of data in a communication...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering

Reexamination Certificate

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Details

C710S029000, C710S057000, C710S056000, C710S053000, C370S229000, C370S230000, C370S231000

Reexamination Certificate

active

06715007

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates to the field of communication systems. More specifically, the present invention relates to the field of data-flow regulation in communication systems.
BACKGROUND OF THE INVENTION
Certain difficulties are encountered in the transmission and reception of data in a communication system. With synchronous serial data, these difficulties encompass mismatches between data source and data sink clocks, variations in data arrival times within the system, and a low tolerance to overrun and underrun conditions.
Under ideal conditions, serial data is transmitted and received at identical data rates. That is, a data-rate clock in a data source would be identical to a data-rate clock in a data sink, e.g., 9600.{overscore (0000)} baud. To do so, however, would require perfectly matched oscillators in both the data source and sink. This is not practical in a real-world system. Crystal tolerances alone would prohibit such exactitude.
Utilizing high-accuracy oscillators, data source and data sink oscillators can become very close in frequency. Close, however, is not exact, and this inexactitude causes problems, especially with substantially continuous data. For example, it may be seen that continuous-data rates of 9600.0001 baud and 9599.9999 baud for the source and sink, respectively, will eventually produce a data overrun. Similarly, continuous-data rates of 9599.9999 baud and 9600.0001 baud for the source and sink, respectively, will eventually produce a data underrun. Both overrun and underrun conditions produce errors in the data stream, and are therefore highly undesirable.
Variations in data arrival rates in multi-source and/or multi-sink systems pose similar problems in that they may lead to overrun and/or underrun conditions. Where either a data source or a data sink (or both) is in motion, the doppler effect may contribute to variations in data arrival rates.
In conventional communication systems, these problems are typically partially or wholly corrected in hardware. Such hardware corrections increase significantly the complexity of the system, with an associated increase in cost. A typical hardware correction utilizes clock lines to synchronize the data rate clocks in both the data source and the data sink.
Data flow proceeds through such a system in lock step with this common synchronizing clock. In this manner, overrun and underrun conditions are eliminated at the expense of system complexity and cost.
In some cases, it is impractical or impossible to synchronize the data rate clocks in hardware. For example, with a software-defined radio, it is generally undesirable to utilize a hardware synchronization scheme in an otherwise software environment because it promotes the dependence of software on hardware in particular architectures. Software then becomes more complex to develop and is more difficult to port to other hardware platforms.
In such cases, elaborate schemes have been developed to synchronize the clocks by transmission. Such schemes typically suffer errors due to transmission delays and doppler shifts, as well as the expense and complexity of implementation.
Conventionally, a FIFO buffer is used to synchronize input and output data rates. This is typically done by interrupting the input data flow (when the input data rate is greater than the output data rate) or the output data flow (when the output data rate is greater than the input data rate) to compensate for rate differences. This produces discontinuous data, which itself may produce overrun or underrun conditions. Such discontinuous data also inhibits proper operation of the data source and/or data sink when continuous data is produced or expected.
What is needed, therefore, is a simple and straightforward method of implementing data-rate regulation in software. Such a method should be capable of compensating for mismatches between the source data rate and the sink data rate. Also, such a method should be capable of easily compensating for variations in data arrival times. Additionally, such a method should prevent data overrun and underrun conditions when the data is continuous over long periods of time.


REFERENCES:
patent: 3840859 (1974-10-01), Vigil et al.
patent: 5210829 (1993-05-01), Bitner
patent: 6138189 (2000-10-01), Kalkunte
patent: 6170022 (2001-01-01), Linville et al.
patent: 6493336 (2002-12-01), Perry et al.

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