Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2002-12-13
2004-06-08
Quach, T. N. (Department: 2814)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C438S048000, C438S459000, C438S753000, C438S960000
Reexamination Certificate
active
06746932
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method, and its application, of reducing the thickness of a silicon substrate which has a superficial porosity, in particular in certain areas.
BACKGROUND INFORMATION
As described in German Published Patent Application No. 197 52 208, in micromechanics porous silicon is primarily used as a sacrificial layer in superficial micromechanical processes in order to, for example, produce cavities which are used for thermal isolation of sensor structures being applied thereon. Due to its low thermal conductivity, porous silicon or oxidized porous silicon may also be used for thermal isolation of sensor structures by itself. The removal of the porous silicon or the oxidized porous silicon produced is omitted in this case to increase the stability of the total system. Such a procedure is described, for example, in unpublished German Patent Application 100 58 009.2.
For producing porous silicon, an electrochemical reaction between a hydrofluoric acid electrolyte and silicon is generally used, whereby a spongelike structure is produced in the silicon, e.g., in the surface area of a silicon wafer. For this purpose the silicon wafer is introduced or immersed into the hydrofluoric acid electrolyte, and the surface of the wafer to be made porous is made into the positive pole vis-a-vis the electrolyte.
Doped silicon wafers are particularly well suited for manufacturing porous silicon, the structure variables within the porous silicon, obtained after porosification, being determined by the type and degree of doping. P-doped silicon wafers having different degrees of doping are preferably used.
Porous silicon has the advantage over conventional silicon due to its large inner surface, and therefore has other important chemical and physical characteristics, e.g., a different etching rate, a different thermal conductivity, and a different thermal capacitance. In particular, through porosification of silicon, its reactivity is clearly increased, which makes selective removal of porous silicon possible using high etching rates vis-a-vis bulk silicon, and in addition, other chemical reactions, e.g., its oxidation, within the porous silicon are made possible or are facilitated.
In thermal sensors based on silicon technology, a good thermal isolation of the sensor structures from a silicon substrate situated beneath them is particularly important. If porous silicon or oxidized porous silicon is produced on a surface area of the silicon wafer in such a thermal sensor, e.g., for thermal isolation, then the quality of the thermal isolation is determined not only by the thickness of this thermally insulating layer but also by the thickness and thermal conductivity of the silicon substrate situated beneath it. If the thickness of the thermally insulating porous layer is too low, or the thickness of the silicon substrate is too high, thermal short circuits may occur.
Using a technology on the basis of porous silicon, it was the initial object of the present invention to minimize the layer thickness of the thermally non-insulating substrate and the thickness of the layer situated beneath the porous area without adding additional complex processing steps. In the manufacture of micromechanical structures it is desirable in many cases to reduce the thickness of the relatively thick silicon wafer for packing reasons. Therefore it was the object of the present invention to integrate this additional thickness reduction procedure into one of the processing steps for the manufacture of micromechanical structures and sensor elements.
SUMMARY OF THE INVENTION
The method according to the present invention of reducing the thickness of a silicon substrate which has a superficial porosity, in particular in certain areas, has the advantage over the related art that it is easily integratable into existing manufacturing processes and usual devices for porosification of silicon may be utilized for its implementation.
Therefore, the method according to the present invention does not require investments in plant engineering, nor does it require substantial modifications in existing manufacturing processes; i.e., using the method according to the present invention, the thickness of silicon substrates may be reduced without additional expense, reducing thermal losses due to the thermal conductivity of the silicon substrate in that way, for example.
Implementing the method according to the present invention has the advantage that, compared to commonly used methods of reducing the thickness of silicon substrates, a very short time is important for removing by etching the porous silicon or the oxidized porous silicon produced. In particular, due to the high reactivity of the porous material produced, thick layers may also be removed by etching in only seconds to minutes, depending on thickness and porosity.
It is advantageous in particular if the silicon substrate is converted into porous silicon or porous silicon oxide, in part of the front surface and the entire back surface. As a rule, the front is defined here by having sensor elements or structures, manufactured using surface micromechanics in particular, produced or positioned there.
It is also advantageous if the porosification of the back is performed by polarity reversal of the voltage during the electrochemical process used for producing the area of porous silicon or porous silicon oxide on the front of the silicon substrate. This polarity reversal may take place once, so that front and back are made porous one after the other, or it may take place alternately, i.e., porosification of front and back of the silicon substrate takes place alternately in small steps. The desired thickness of the back layer of porous silicon is easily adjustable in a known manner via the duration and degree of porosification, so that a well-defined thickness of the layer of porous material is removed from the back, resulting in a similarly well-defined reduction in the original thickness of the silicon substrate after the removal from the back of the porous material produced, which is easily pre-adjusted via the back porosification parameters.
It is also advantageous that all conceivable shapes of microstructures for forming sensor elements, in particular thermal sensor elements, may be produced on the front of the silicon substrate, for example via the porous area which is covered there by a cover layer or a passivation layer. The method according to the present invention is therefore suitable for use in the manufacture of all thermally operating sensors on the basis of a technology using porous silicon, in particular in the manufacture of temperature sensors, mass flow sensors, air quality sensors, or gas sensors.
REFERENCES:
patent: 5453394 (1995-09-01), Yonehara et al.
patent: 5536361 (1996-07-01), Kondo et al.
patent: 5949123 (1999-09-01), Le et al.
patent: 6103009 (2000-08-01), Atoji
patent: 6277712 (2001-08-01), Kang et al.
patent: 197 52 208 (1999-06-01), None
patent: 100 58 009 (2002-06-01), None
Kenyon & Kenyon
Quach T. N.
Robert & Bosch GmbH
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