Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-11-05
2003-09-23
Nguyen, Ha Tran (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S622000, C438S627000, C438S660000, C438S663000
Reexamination Certificate
active
06624075
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor devices and their methods of fabrication. More particularly, the present invention relates to the processing of copper interconnect material and the resultant device utilizing the same. Even more particularly, the present invention relates to reducing electromigration in copper interconnect lines by doping their surfaces with a barrier material using wet chemical methods.
BACKGROUND OF THE INVENTION
Currently, the semiconductor industry is demanding faster and denser devices (e.g., 0.05-&mgr;m to 0.25-&mgr;m) which implies an ongoing need for low resistance metallization. Such need has sparked research into resistance reduction through the use of barrier metals, stacks, and refractory metals. Despite aluminum's (Al) adequate resistance, other Al properties render it less desirable as a candidate for these higher density devices, especially with respect to its deposition into plug regions having a high aspect ratio cross-sectional area. Thus, research into the use of copper as an interconnect material has been revisited, copper being advantageous as a superior electrical conductor, providing better wettability, providing adequate electromigration resistance, and permitting lower depositional temperatures. The copper (Cu) interconnect material may be deposited by chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), sputtering, electroless plating, and electrolytic plating.
However, some disadvantages of using Cu as an interconnect material include etching problems, corrosion, and diffusion into silicon.
1
These problems have instigated further research into the formulation of barrier materials for preventing electromigration in both Al and Cu interconnect lines. In response to electromigration concerns relating to the fabrication of semiconductor devices particularly having aluminum-copper alloy interconnect lines, the industry has been investigating the use of various barrier materials such as titanium-tungsten (TiW) and titanium nitride (TiN) layers as well as refractory metals such as titanum (Ti), tungsten (W),
1
Peter Van Zant, Microchip Fabrication: A Practical Guide to Semiconductor Processing, 3
rd
Ed., p. 397 (1997). tantalum (Ta), molybdenum (Mo), and their silicides.
2
Although the foregoing materials are adequate for Al interconnects and Al—Cu alloy interconnects, they have not been entirely effective with respect to all-Cu interconnects. Further, though CVD and PECVD have been conventionally used for depositing secondary metal(s) on a primary metal interconnect surface, neither technique provides a cost-effective method of forming a copper-zinc alloy on a Cu interconnect surface. Therefore, a need exists for a low cost and high throughput method of reducing electromigration in copper interconnect lines by restricting Cu-diffusion pathways along a Cu surface via doping the Cu surface with Zn from an interim copper-zinc (Cu—Zn) alloy thin film electroplated on the copper (Cu) surface from a stable chemical solution, and controlling the Zn-doping thereof, which also improves interconnect reliability and corrosion resistance.
BRIEF SUMMARY OF THE INVENTION
Accordingly, the present invention provides a method of reducing electromigration in copper interconnect lines by restricting Cu-diffusion pathways along a Cu surface via doping the Cu surface with Zn from an interim copper-zinc (Cu—Zn) alloy thin film electroplated on the copper (Cu) surface from a stable chemical solution, and controlling the Zn-doping thereof, which also improves interconnect reliability and corrosion resistance, and a semiconductor device thereby formed. The present method involves electroplating by immersing the Cu surface, such as a blanket Cu seed layer and a partial thickness plated Cu layer, into a unique nontoxic aqueous chemical electroplating solution containing salts of zinc (Zn) and copper (Cu), their complexing agents, a pH adjuster, and surfactants, thereby forming an interim Cu—Zn alloy thin film having some degree of oxygen (O) concentration, wherein the Zn-doping is controllable by varying the electroplating conditions; and annealing the interim Cu—Zn alloy thin film formed on the Cu surface in an environment such as vacuum, nitrogen (N
2
), hydrogen (H
2
), formine (N
2
H
2
), or mixtures thereof for reducing the O-concentration in the alloy thin film layer, for modifying the grain structure of the Cu—Zn alloy thin film as well as of the underlying Cu surface, and for forming a mixed Cu—Zn/Cu interface; and further electroplating the alloy thin film layer with Cu for completely filling the via, thereby forming the interconnect structure. The present invention further provides a particular electroplating method which controls the parameters of Zn concentration, pH, temperature, and time in order to form a uniform reduced-oxygen copper-zinc
2
Id., at 392. alloy (Cu—Zn) thin film on a cathode-wafer surface such as a copper (Cu) surface for reducing electromigration in the device by decreasing the drift velocity therein which decreases the Cu migration rate in addition to decreasing the void formation rate.
More specifically, the present invention provides a method of fabricating a semiconductor device, having a first interim reduced-oxygen copper-zinc alloy (Cu—Zn) thin film formed on a copper (Cu) surface and a second interim reduced-oxygen Cu—Zn alloy thin film formed on a Cu-fill, both films being formed by electroplating the Cu surface and the Cu-fill, respectively, in a chemical solution, generally comprising the steps of: providing a semiconductor substrate having a Cu surface, an optional barrier layer, and an optional underlayer formed in a via; providing a chemical solution; immersing the Cu surface in the chemical solution, thereby forming a first interim Cu—Zn alloy thin film on the Cu surface; rinsing the first interim Cu—Zn alloy thin film in a solvent; drying the first interim Cu—Zn alloy thin film under a gaseous flow; annealing the first interim Cu—Zn alloy thin film formed on the Cu surface, thereby forming a first interim reduced-oxygen Cu—Zn alloy thin film; filling the via with Cu on the first interim reduced-oxygen Cu—Zn alloy thin film, thereby forming a Cu-fill; annealing the Cu-fill, the first interim reduced- oxygen Cu—Zn alloy thin film, the Cu surface, the optional barrier layer, and the optional underlayer; immersing the annealed Cu-fill in the chemical solution, thereby forming a second interim Cu—Zn alloy thin film on the annealed Cu-fill; rinsing the second interim Cu—Zn alloy thin film in a solvent; drying the second interim Cu—Zn alloy thin film under a gaseous flow, for instance, under a gaseous nitrogen flow (GN
2
); annealing second interim Cu—Zn alloy thin film formed on the Cu-fill, thereby diffusing a plurality of Zn ions from the second interim Cu—Zn alloy thin film into the Cu-fill, and thereby forming a second interim reduced-oxygen Cu—Zn alloy thin film comprising the second interim Cu—Zn alloy thin film as well as an upper portion of the Cu-fill; planarizing second interim reduced-oxygen Cu—Zn alloy thin film, the Cu-fill, the first interim reduced-oxygen Cu—Zn alloy thin film, the Cu surface, the optional barrier layer, and the optional underlayer, thereby forming an encapsulated dual-inlaid interconnect structure; and completing formation of the semiconductor device.
By electroplating this Cu—Zn alloy thin film on the cathode-wafer surface such as a Cu surface using a stable chemical solution in the prescribed concentration ranges and by subsequently annealing the Cu—Zn alloy thin film electroplated on the Cu surface, the present invention improves Cu interconnect reliability, enhances electromigration resistance, improves corrosion resistance, and reduces manufacturing costs. In particular, the present invention chemical solution is advantageous in that it facilitates formation of an acceptable Cu—Zn alloy thin film over a wide range of bath compositions while the subsequent annealing step removes undesirable oxygen impurities f
Lopatin Sergey
Nickel Alexander H.
Advanced Micro Devices , Inc.
LaRiviere Grubman & Payne, LLP
Nguyen Ha Tran
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