Method of reducing charging damage to integrated circuits...

Details Method of reducing charging damage to integrated circuits... Method of reducing charging damage to integrated circuits...

2006-04-20

2008-03-18

Lee, Calvin (Department: 2818)

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

Ion implantation of dopant into semiconductor region

C257S607000

Reexamination Certificate

active

07344963

ABSTRACT:
A semiconductor substrate having an integrated circuit die area surrounded by a scribe lane is provided. Within the integrated circuit die area, a first trench isolation region and a second trench isolation region are formed on the semiconductor substrate, wherein the first trench isolation region isolates a first active device region from a second active device region, and the second trench isolation region comprises a plurality of trench dummy features for reducing loading effect. A first gate electrode is formed on the first active device region and a second gate electrode on the second active device region. The first active device region is masked, while the second active device region and the trench dummy features are exposed. An ion implantation process is then performed to implant dopant species into the second active device region.

REFERENCES:
patent: 5998282 (1999-12-01), Lukaszek

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