Method of reading memory device in page mode and row decoder...

Details Method of reading memory device in page mode and row decoder... Method of reading memory device in page mode and row decoder...

2005-08-16

2005-08-16

Dinh, Son T. (Department: 2824)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S189080, C365S194000, C365S238500

Reexamination Certificate

active

06930952

ABSTRACT:
The Disclosed is a method of reading a memory device in a page mode. The method includes the steps of inputting a row address for selecting the word line, enabling a corresponding word line by the row address, and reading/restoring the level of the cell node connected to the enabled word line, and disabling the enabled word line and sequentially enabling bit line sense amplifiers connected to the disabled word line to perform a read operation, wherein the disabling of the selected word line is performed after a lapse of a certain time period as much as data of a first cell node can be restored. Therefore, it is possible to reduce current consumption in a read operation of a page mode.

REFERENCES:
patent: 5640363 (1997-06-01), Furutani et al.
patent: 5642326 (1997-06-01), Sakurai et al.
patent: 5745428 (1998-04-01), Rao

Affiliated with

Also associated with

Rating

Method of reading memory device in page mode and row decoder... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of reading memory device in page mode and row decoder..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of reading memory device in page mode and row decoder... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3476731