Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
1998-11-16
2001-10-23
Moise, Emmanuel L. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S776000, C360S070000, C360S125330, C386S349000
Reexamination Certificate
active
06308298
ABSTRACT:
FIELD OF THE INVENTION
The present invention pertains generally to magnetic tape drives, and more particularly to a method of reacquiring dock synchronization in a non-tracking helical scan tape device.
RELATED PATENTS
The present invention is related to co-pending U.S. patent application entitled “Method And Apparatus For Logically Rejecting Previously Recorded Track Residue From Magnetic Media”, invented by McAuliffe et al., and having a Ser. No. 09/192,794, filed concurrently herewith on Nov. 16, 1998, and co-pending U.S. patent application entitled “Method And System For Monitoring And Adjusting Tape Position Using Control Data Packets”, invented by McAuliffe et al., and having a Ser. No. 09/193,030, filed concurrently herewith on Nov. 16, 1998, and co-pending U.S. patent application entitled “Rogue Packet Detection And Correction Method For Data Storage Device”, invented by McAuliffe et al., and having a Ser. No. 09/192,809, filed concurrently herewith on Nov. 16, 1998, and co-pending U.S. patent application entitled “Variable Speed Recording Method and Apparatus for a Magnetic Tape Drive”, invented by Beavers et al., and having a Ser. No. 09/176,079, filed on Oct. 20, 1998, and U.S. patent application entitled “Overscan Helical Scan Head for Non-Tracking Tape Subsystems Reading at up to 1×Speed and Method for Simulation of Same”, invented by Blatchley et al., and having a Ser. No. 09/176,013, filed on Oct. 20, 1998, now U.S. Pat. No. 6,246,551, and co-pending U.S. patent application entitled “Fine Granularity Rewrite Method and Apparatus for Data Storage Device”, invented by Zaczek, and having a Ser. No. 09/176,015, filed on Oct. 20, 1998, and co-pending U.S. patent application entitled “Multi-level Error Detection and Correction Technique for Data Storage Recording Device”, invented by McAuliffe et al., and having a Ser. No. 09/176,014, filed on Oct. 20, 1998, all of which are commonly owned and all of which are hereby incorporated by reference.
BACKGROUND OF THE INVENTION
A traditional magnetic storage device relies on a track-following architecture in which the tape drive attempts to follow a previously written track when reading it back by maintaining a very precise alignment between the path traced by the read heads and the written tracks on a tape.
In a track-following architecture, the read channel circuitry employs a phase locked loop (PLL) which locks a synchronization clock signal to the read signal (i.e., the incoming data from the read heads) in order to properly perform data detection. In track-following storage devices, the PLL acquires lock of the clock synchronization signal once at the beginning of the read session, and maintains lock for the entire session.
Recently, non-track-following storage devices have been developed. In these non-tracking storage devices, the previously written track is not followed continuously. Instead the read head may begin on one track and drift over to an adjacent track during the read operation. In this situation, the read signal will degrade during the crossover period, and dock synchronization may be lost. If the frequency of the clock synchronization signal drifts too far during this crossover period, it will prevent reacquisition of lock when approaching the next adjacent track. A similar effect can happen when reading through a long magnetic defect on the tape.
It is difficult to reliably detect when the read heads are deviating from a track based solely on the read head signal amplitude. If the read head is partially over the track that it is departing from, and in addition is partially over an adjacent track being approached, the overall signal amplitude may not be detectably reduced. However, the signal quality would prevent the data from either track from being successfully read.
Accordingly, a need exists for a method for detecting when a read head is moving off track and for reacquiring clock synchronization in a non-tracking storage device when the read head moves off track.
SUMMARY OF THE INVENTION
The present invention is a novel method of reacquiring clock synchronization in a non-tracking storage device when the quality of the read signal goes below a predetermined threshold. In accordance with the invention, the packet error detection status is monitored. During a normal successful read, a phase locked loop (PLL) receives the read signal comprising data recovered from the tape. A read quality detector utilizes the packet error detection status to determine whether the read packet error count exceeds a predetermined error count threshold. When the error threshold is reached or exceeded, the read channel is disabled and PLL is relocked to a reference frequency. The read channel is then re-enabled and the process repeated to monitor whether the read head is on or off track.
In accordance with one embodiment of the invention, if the packet decoder detects one or more good packets, the quality of the read signal is considered to be acceptable. If subsequently no good packets out of a predetermined number of subsequent recovered packets are detected, the quality of the read signal is considered unacceptable. This may be caused because the read head is off track or over a defect region of the tape. A counter receives a reconstructed packet clock that pulses once each time a packet is reconstructed. The counter is reset each time a good packet is detected. The read quality detector compares the the count value in the counter to a predetermined error count threshold. When the error threshold is reached or exceeded, the read quality detector shuts down the read channel, switches the input to the PLL from the read signal to known reference frequency, and waits a predetermined amount of time in order for the PLL to relock to the reference frequency. At the end of the wait period, the read quality detector re-enables the read channel and switches the input to the PLL back to the read signal.
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Blatchley Michael A.
McAuliffe Richard
Clement Jessica
Ecrix Corporation
Moise Emmanuel L.
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