Method of providing redundancy in electrically alterable memorie

Static information storage and retrieval – Read/write circuit – Testing

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Details

365200, 3651859, 371 102, G11C 700, G11C 1606

Patent

active

058354301

ABSTRACT:
A method of providing redundancy in an electrically alterable memory divided into addressable blocks within the memory. The electrically alterable memory should have more available blocks than required by the firmware. The method includes the steps of testing the memory to create block status information about good versus bad blocks, writing the block status information into a table in the electrically alterable memory, reordering the table so that contiguous series of entries in the table point only to good blocks, and then providing a block status array comprising block select registers which are initialized with the corresponding ones of the contiguous series of entries so that a nominal address to a bad block is redirected to a good block.

REFERENCES:
patent: 5473753 (1995-12-01), Wells et al.
patent: 5524231 (1996-06-01), Brown
patent: 5642307 (1997-06-01), Jernigan
patent: 5671229 (1997-09-01), Harari et al.

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