Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure
Patent
1997-12-23
2000-07-25
Mulpuri, Savitri
Semiconductor device manufacturing: process
Semiconductor substrate dicing
Having specified scribe region structure
438465, 438476, 438402, H01L 21301
Patent
active
06093624&
ABSTRACT:
A method of providing a gettering scheme in the manufacture of individual Silicon-On-Insulator (SOI) integrated circuits from an SOI wafer containing a number of such integrated circuits includes the steps of providing a gettering material in scribe lanes along which the SOI wafer is to be diced to obtain the individual SOI integrated circuits. The SOI wafer is then diced along the scribe lanes, leaving a portion of the gettering material on the diced edges of the individual integrated circuits. This method provides a simple and effective method for gettering in SOI technology in which diffusing impurities can be trapped before diffusing into the active area of the integrated circuits.
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Letavic Theodore J.
Zingg Rene P.
Biren Steven R.
Mulpuri Savitri
Philips Electronics North America Corporation
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