Method of providing a dielectric structure for semiconductor dev

Details Method of providing a dielectric structure for semiconductor dev Method of providing a dielectric structure for semiconductor dev

1994-12-23

1997-11-18

Nguyen, Tuan H.

Fishing, trapping, and vermin destroying

437 47, 437 52, 437 60, 437919, 148DIG14, H01L 2102

Patent

active

056887248

ABSTRACT:
A dielectric structure on a substrate includes a primary dielectric layer on the substrate, the primary dielectric being a metal oxide, such as tantalum pentoxide, having a high dielectric constant, and a secondary dielectric layer, such as an oxide or nitride of silicon, on the primary dielectric layer. In one embodiment, a multi-layer structure includes a second primary dielectric layer disposed on the secondary dielectric layer, and a second secondary dielectric layer disposed on the second primary dielectric layer, each primary dielectric layer being in a first crystalline state characterized by low leakage current for a given applied electrical field. A method of forming a dielectric structure on a substrate includes forming a layer of a primary dielectric, which is a metal oxide having a high dielectric constant, forming a secondary dielectric layer on the primary dielectric layer, and annealing the primary dielectric layer.

REFERENCES:
patent: 3668004 (1972-06-01), Yamamoto et al.
patent: 3730766 (1973-05-01), Nishimatsu et al.
patent: 3967310 (1976-06-01), Horiachi et al.
patent: 4335391 (1982-06-01), Morris
patent: 4495219 (1985-01-01), Kato et al.
patent: 4636833 (1987-01-01), Nishioka et al.
patent: 4659606 (1987-04-01), Wada et al.
patent: 4690846 (1987-09-01), Wada et al.
patent: 4891684 (1990-01-01), Nishioka et al.
patent: 4937650 (1990-06-01), Shinriki et al.
patent: 4989056 (1991-01-01), Hiraiwa et al.
patent: 5072269 (1991-12-01), Hieda
patent: 5091761 (1992-02-01), Hiraiwa et al.
patent: 5111355 (1992-05-01), Anand et al.
patent: 5173835 (1992-12-01), Cornett et al.
patent: 5225286 (1993-07-01), Fujikawa et al.
Shinriki & Nakata, "UV-O.sub.3 and Dry-O.sub.2 : Two Step Annealed Chemical Vapor-deposited Ta.sub.2 O.sub.5 Films for Storage Dielectrics of 64-Mb DRAM's", IEEE Transactions on Electron Devices, vol. 38, No. 3, Mar. 1991, pp. 455-462.

Affiliated with

Also associated with

Rating

Method of providing a dielectric structure for semiconductor dev does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of providing a dielectric structure for semiconductor dev, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of providing a dielectric structure for semiconductor dev will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1565306