Electrical computers and digital processing systems: support – Multiple computer communication using cryptography – Protection at a particular protocol layer
Patent
1997-02-03
1999-09-21
Palys, Joseph E.
Electrical computers and digital processing systems: support
Multiple computer communication using cryptography
Protection at a particular protocol layer
711163, G06F 1100
Patent
active
059548185
ABSTRACT:
A method of writing to flash memory cells in a flash memory device. The flash memory device includes a first memory array and a second independent memory array. The first memory array includes memory blocks each having a memory cell. The second independent memory array includes block lock-bits each corresponding to one of the memory blocks. The method of writing to a memory cell in one of the memory blocks of the first memory array includes the steps of issuing a command to write to the memory cell, determining if a corresponding block lock-bit in the second independent memory array is set, and writing to the memory cell if the corresponding block lock-bit is not set.
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Dalvi Vishram Prakash
Evertt Jeff
Haid Christopher John
Javanifard Jahanshir J.
Kreifels Jerry
Intel Corporation
Palys Joseph E.
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