Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
2000-11-02
2003-10-21
Huff, Mark F. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S312000, C430S315000, C438S099000, C438S218000, C438S659000
Reexamination Certificate
active
06635406
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method of providing a vertical interconnect between a first and a second thin-film microelectronic device, wherein a vertical interconnect area is provided which is an area of overlap of a stack comprising a first electrically conducting area, an organic electrically insulating area and a second electrically conducting area, said first electrically conducting area being electrically connected to a terminal of said first microelectronic device and said second electrically conducting area being electrically connected to a terminal of said second microelectronic device.
Such a method is known from WO 99/10929, which discloses mechanically forming a vertical interconnect between a first and a second thin-film microelectronic device using a tool tip to make a notch in a vertical interconnect area of two organic electrically conducting areas which are separated from each other by an organic electrically insulating area. The tool tip is preferably tapered and has a preferred tip radius between 0.1 &mgr;m and 5.0 &mgr;m. The first and second electrically conducting areas are made of organic material including heavily doped semiconducting polymers, such as a polyaniline. The organic electrically insulating materials used for the insulating area are exemplified by a polyvinylalcohol or a polyvinylphenol.
Electronic circuits based partly or entirely on organic polymeric materials are foreseen to play a major role in the coming years in areas of electronics where low cost or flexibility is an essential requirement. Application areas such as electronic barcodes and smart cards are the current target areas since the prime concern for such products is cost. Organic polymeric materials are easy to apply by known techniques such as spin coating or printing and thus offer significant potential cost savings over conventional silicon technology where photolithography, implantation and etching are necessary. In addition polymeric materials offer excellent mechanical properties such as flexibility.
In integrated circuits (ICs) which are constituted by a plurality of thin-film microelectronic devices, for example a plurality of field-effect transistors, memory units, rectifiers, diodes as well as antennas interconnects between such devices are to be provided. An interconnect provides an electrical connection between a terminal of a first and a second thin-film microelectronic device. Sometimes, it is necessary to provide an interconnect which extends through a stack of layers. An interconnect of this type is referred to as a vertical interconnect or, in short, a “via”.
In silicon-based IC technology, vertical interconnects are made by photo-lithographically defining a contact window, etching so as to obtain a contact hole and, subsequently, filling the contact hole by depositing metal; see, e.g., VLSI Technology, ed. Sze, McGraw-Hill (1983), p 447.
Microelectronic devices consisting substantially of organic materials have been disclosed, for example by Garnier et al., Science (1994) 265:1684-1686, but no methods of making vertical interconnects between thin film devices were mentioned. Microelectronics based on organic materials may be effectively used in applications where the use of silicon-based technology is prohibitively expensive.
U.S. Pat. No. 4,702,792 describes a method of forming fine conductive lines, patterns and connectors, wherein polymeric photoresist material is applied to a substrate and is patterned to form openings and spaces which are then filled with conductive material of metal or metal alloy. The patterned photoresist is preferably treated with an organometallic compound to create an etch-resistant form of the photoresist. Excess conductive material is removed by chemical-mechanical polishing to expose the polymeric material. No disclosure is made of a vertical interconnect between a first and second thin-film microelectronic device, such as an integrated circuit.
U.S. Pat. No. 5,567,550, U.S. Pat. No. 5,677,041 and U.S. Pat. No. 5,691,089 describe the fabrication of a mask for making integrated circuits formed in radiation sensitive material, in which a doped radiation sensitive layer, preferably of polyimide, is formed on a substrate, un undoped polyimide layer is formed over the doped polyimide layer which is radiated to form first and second source drain regions extending to a top portion of the doped polyimide region. A top portion of the undoped polyimide is also irradiated to form a gate region between the first source/drain region and the second source/drain region. A channel is thereby formed in the doped layer beneath the gate region.
U.S. Pat. No. 5,689,428 discloses integrated circuits, transistors, data processing systems etc. which are made by a process including steps of applying an electrical resistance body of radiatively dosed radiation sensitive polymeric material. The radiation sensitive material preferably comprises a polyimide.
EP-A-0 399 299 discloses electron discharge layers containing electrically conductive polymeric materials comprising doping precursors which generate dopants upon exposure of energy. Conductivity can be selectively induced in the polymer by selectively doping under selective exposure to a source of energy which causes the reagent to decompose to dope those regions in the polymer which are exposed to the energy forming a conductive polymer in exposed regions. In the exposed region/the polymer is rendered insoluble and in the unexposed regions the polymer is soluble and can thereby be removed to act as a negative photoresist which is selectively electrically conducting.
In polymeric integrated circuits, mechanical techniques are currently used for providing vertical interconnects between thin-film electronic devices; see WO 99/10929, mentioned above. A drawback of mechanical vertical interconnects is the limited throughput due to the sequential nature of the process and the limited positional accuracy which requires the use of a relatively large surface area. Moreover, a mixture of technologies such as photolithography and mechanical stitching is not desirable for the realization of a reel-to-reel process.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide an efficient method for producing vertical interconnects which preferably are substantially made of organic polymeric materials, which obviates the problems mentioned.
It has now been found that vertical interconnects in substantially plastic electronics can be efficiently and reliably produced photochemically, wherein a photochemical resist is used which is chosen such that the part outside the overlapping area is maintained as electrically insulating area or part thereof, resulting in products with excellent properties. The method is therefore suitable for large scale production.
In accordance with the present invention there is provided a method of producing a vertical interconnect between a first and a second thin-film microelectronic device, wherein a vertical interconnect area is provided which is an area of overlap of a stack of layers comprising a first electrically conducting area, an organic electrically insulating area, a second organic electrically conducting area, and optionally an organic electrically semiconducting area, said areas being formed one by one, and at least one of said first or said second electrically conducting areas being positioned adjacent to and after said organic electrically insulating area, said first electrically conducting area being electrically connected to a terminal of said first microelectronic device and said second electrically conducting area being electrically connected to a terminal of said second microelectronic device, characterized in that
said organic electrically insulating area comprises photoresist material,
said insulating area is removed within said area of overlap before said adjacent first or said second electrically conducting area is positioned, and
said removed insulating area is substituted by an electrically conducting are
De Leeuw Dagobert Michel
Gelinck Gerwin Hermanus
Matters Marco
Huff Mark F.
Koninklijke Philips Electronics , N.V.
Piotroski Daniel J.
Sager K
LandOfFree
Method of producing vertical interconnects between thin film... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of producing vertical interconnects between thin film..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of producing vertical interconnects between thin film... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3145676