Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Polycrystalline semiconductor
Reexamination Certificate
2000-09-29
2002-10-29
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
Polycrystalline semiconductor
C438S149000, C438S163000, C438S030000, C438S485000
Reexamination Certificate
active
06472297
ABSTRACT:
TECHNICAL FIELD
This invention relates to a TFT array substrate for a liquid crystal display device in an active matrix mode, using a thin film transistor.
BACKGROUND ART
In recent years, there have been actively developed liquid crystal display devices in an active matrix mode in which a polysilicon thin film transistor (referred to as a poly-Si TFT hereinafter) of a low temperature processed type is used as a control element instead of an amorphous silicon thin film transistor. The reasons thereof are as follows: the exactitude of liquid crystal display devices can be made higher and their numerical aperture can be made higher because the poly-Si TFT has a larger electric field-effect mobility than the amorphous silicon TFT; and it may be possible to provide liquid crystal display devices having a large area and a high exactitude at low cost since the low temperature processed type makes it possible to use an inexpensive glass substrate.
Referring to
FIG. 7
, a method for producing such a low temperature processed poly-Si TFT will be described. In
FIG. 7
,
701
,
702
,
703
,
704
and
705
represent a glass substrate, a buffer layer, an amorphous silicon layer, a polysilicon layer and a gate insulator layer, respectively.
706
,
707
,
708
,
709
,
710
and
711
represent a gate electrode, a source area, a drain area, contact holes, a source electrode and a drain electrode, respectively.
In the process for production thereof, the buffer layer
702
made of a Si
3
N
4
, for example, 600 Å in thickness is first formed on the glass substrate
701
. Amorphous silicon is deposited on the entire surface of this buffer layer
702
(FIG.
7
(
a
)). Next, the entire surface of this amorphous silicon layer
703
is irradiated with an excimer laser to heat and melt the silicon and re-crystallize it. In this way, the polysilicon layer
704
is made. A Si
3
N
4
layer, for example, 200 Å in thickness and a SiO
2
layer 1500 Å in thickness are vapor-deposited on the polysilicon layer
704
to form the gate insulator layer
705
. The gate electrode
706
made of Mo, for example, 6000 Å in thickness is formed on the gate insulator layer
705
. Phosphorus ion is implanted into the polysilicon layer
704
through the gate electrode
706
as a mask (FIG.
7
(
b
)). Irradiation with an excimer laser is again conducted to activate the phosphorus ion implanted into the polysilicon layer
704
. In this way, the source area
707
and the drain area
708
are made (FIG.
7
(
c
)). At last, the gate insulator layer
705
is etched to make the contact holes
709
/
709
reaching the source area
707
and the drain area
708
. In this way, the source electrode
710
and the drain electrode
711
each having a thickness of 3000 Å, in which Al is embedded in the contact holes
709
/
709
, are formed. By the above-mentioned process, a low temperature processed poly-Si TFT is completed.
In this method, a rise in the temperature of the substrate is a little (about 600° C. or lower) since the excimer laser is used for polycrystallization. Therefore, an inexpensive substrate can be used, and a polysilicon thin film having a larger area can be formed, as compared with high temperature processing method (about 1000° C.). Thus, the screen of liquid crystal display devices can be made large.
However, if the above-mentioned low temperature processing method is used to produce a liquid crystal display device having a large screen, display unevenness becomes large. At present, sufficient display performance cannot be realized.
DISCLOSURE OF THE INVENTION
A main object of the present invention is to overcome the above-mentioned problems in a low temperature processed poly-Si TFT in the prior art. More specifically, it is an object to provide a poly-Si TFT array substrate having a high electric field-effect mobility and a little in-plane dispersion without using an expensive quartz substrate. It is another object to use such a poly-Si TFT array substrate so as to provide a more inexpensive liquid crystal device having a large screen, a high exactitude and a high performance.
Before disclosure of the constitution of the present invention for attaining the above-mentioned objects, the cause of generation of display unevenness in low temperature processed poly-Si TFTs in the prior art will be discussed.
FIG. 4
is a schematic plan view of a TFT array substrate. In
FIG. 4
,
412
and
413
represent a glass substrate, and a pixel area formed on the glass substrate
412
, respectively. In this pixel area
413
, non-illustrated pixels are arranged in a matrix form and non-illustrated pixel switching TFTs are arranged so as to correspond to the respective pixels.
414
and
415
represent so-called peripheral driving circuits for driving the pixel-switching TFTs. For example,
414
represents a gate driving circuit unit and
415
represents a source driving circuit unit having therein the TFTs.
As shown in
FIG. 7
, in conventional methods, amorphous silicon is deposited on the entire surface of the glass substrate
412
. Thereafter, the substantially entire surface of the amorphous silicon layer is irradiated with an excimer laser to melt and polycrystallize the silicon. According to this method, however, the following problems arise.
That is, since the width of an excimer laser is limited, a large area is not irradiated with the laser at once. Thus, a method in which a linear excimer laser (line beam) is successively scanned on a substrate is adopted. However, according to this method, long and narrow crystal grains are produced along the line direction of the line beam. Furthermore, the shapes and the sizes of the crystal grains easily become nonuniform since this method is a method in which the crystallization is successively attained. The amorphous silicon layer has no crystal nuclei for inducing crystal growth at the initial stage of crystallization. Thus, at some stage that the excimer laser is applied and the crystallization starts, crystal nuclei are generated uncertainly and disorderedly so that crystal grows rapidly. Therefore, the crystal growth becomes unstable and disordered so that the shapes and the sizes of the crystal grains become nonuniform. Moreover, grain boundaries where very small crystal grains collide with each other swell and the structure of the grain boundary portions are distorted since the crystal grows rapidly.
In reality, the inventors scanned an excimer laser (line beam) on a 320 mm×400 mm amorphous silicon layer to carry out polycrystallization, and then examined the electric field-effect mobility of respective sites of this polysilicon layer. As a result, it was verified that the electric field-effect mobility varied within the range of 50 to 300 cm
2
/V-s, dependently on the sites. The following tendency was also verified: polysilicon at the peripheral area had a higher electric field-effect mobility than polysilicon at the center.
In other words, according to the method for producing a low temperature processed poly-Si TFT which has been hitherto known, the electric field-effect mobility of its polysilicon layer becomes nonuniform. This tendency becomes remarkable, particularly in TFTs formed in an array form in a pixel area. This would cause display unevenness (for example, linear unevenness). On the other hand, according to a high temperature processing polycrystallization method (about 1000° C. or higher), which is performed using an expensive quartz substrate, the above-mentioned problems of the low temperature process method are easily solved. However, according to the high temperature processing method, it is difficult that a large screen is produced. Moreover, a problem that costs increase arises.
The present invention for solving problems as describe above has the following constitutions. The present invention is classified to from a first invention group to a seventh invention group, and these groups will be successively described.
(1) First Invention Group
A first embodiment of the present invention concerned in the first invention g
Adachi Kazuyasu
Ogawa Kazufumi
Parkhurst & Wendel L.L.P.
Trinh Michael
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