Method of producing stepped wall interconnects and gates

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

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438666, 438669, H01L 213205

Patent

active

058800158

ABSTRACT:
A method is provided for making conductive structures whereby an insulating layer is formed over a substrate. A conductive layer is then formed over the insulating layer. A first photoresist layer is formed over the conductive layer, patterned and developed. The conductive layer is etched after which the first photoresist layer is removed. A second photoresist layer is formed over the integrated circuit, patterned and developed. The remaining regions of the conductive layer forming an interconnect or a gate are partially etched to form two-tiered stepped sidewalls.

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