Method of producing semiconductor devices and method of evaluati

Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure

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438 17, H01L 2358

Patent

active

060312467

ABSTRACT:
A simulation method capable of efficiently evaluating reliability of gate oxide films formed on the elements within short periods of time to evaluate characteristics of a semiconductor device made up of elements of any size and any number. In a semiconductor device having transistors formed thereon, a pattern for evaluating characteristics of a semiconductor device characterized in that gate area portions, gate bird's-beak portions and LOCOS bird's-beak portions, are factors affecting the insulation breakdown of the gate oxide film, are rendered to be variable, so that the shapes of these portions can be handled as independent parameters.

REFERENCES:
patent: 4343877 (1982-08-01), Chiang
patent: 4413271 (1983-11-01), Gontowski, Jr. et al.
patent: 4672314 (1987-06-01), Kokkas
patent: 4739388 (1988-04-01), Packeiser et al.
patent: 5506441 (1996-04-01), Furuya

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