Method of producing multilayer interconnection structure

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S678000, C438S785000, C438S680000, C438S674000, C438S650000

Reexamination Certificate

active

07022598

ABSTRACT:
A method of producing a buried-type multilayer interconnection structure is provided. The method comprises steps of: forming a hole portion in an insulating layer; forming a catalyst layer having average film thickness from 0.2 nm to 10 nm on a surface of the hole portion by a physical vapor deposition method; forming an electroless plating layer on the surface of the hole portion by an electroless plating method using the catalyst layer as a catalyst; and burying up the hole portion with an electrolytic plating layer by an electrolytic plating method using the electroless plating layer as a seed layer.

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Z. Wang, T. Ida, H. Sakaue, S. Shingubara and T. Takahagi “Electroless Plating of Copper on Metal-Nitride Diffusion Barriers Initiated Displacement Plating” Electrochemical and Solid-State Letters, 6 (3) C38-C41 (2003).
Zenglin Wang, Osamu Yaegashi, Hiroyuki Sakaue, Takayuki Takahagi, and Shoso Shingubara “Suppression of native oxide growth in sputtered TaN films and its application to Cu electroless plating” Journal of Applied Physics, Oct. 1, 2003 p4697-4701.
Zenglin Wang, Hiroyuki Sakaue, Shoso Shingubara and Talayuki Takahagi “Influence of Surface Oxide of Sputtered TaN on Displacement Plating of Cu” Jpn. Appl. Phys. vol. 42 (2003) pp. 1843-1846.
Zenglin Wang, Osamu Yaegashi, Hiroyuki Sakaue, Talayuki Takahagi and Shoso Shingubara “Highly Adhesive Electroless Cu Layer Formation Using an Ultra Thin Ionized Cluster Beam (ICB)-Pd Catalytic Layer for Sub-100nm Cu Interconnections” Jpn. J. Appl. Phys. vol. 42(2003) pp. L1223-L1225.

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