Method of producing an integrated circuit configuration

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device

Reexamination Certificate

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C430S005000, C430S311000, C430S313000, C430S314000, C430S317000, C438S296000, C438S404000, C438S424000, C438S437000, C438S692000, C716S030000

Reexamination Certificate

active

06617096

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to a method of producing an integrated circuit configuration in which active regions are surrounded and insulated by trenches filled with insulating material.
Increasingly, integrated circuits are configured in which active regions are insulated from one another by trenches which are filled with insulating material and surround the active regions. In this specialist area, such insulation is called shallow trench isolation (STI).
To produce an integrated circuit with shallow trench isolation, trenches defining active regions are first etched in a main surface of a semiconductor substrate. The trenches are then filled with insulating material. One problem with this is the formation of a planar surface over the whole semiconductor substrate.
A proposal has been made (see B. Davaria et al., IEDM 89, pages 61 to 64), for filling the trenches, to start by depositing a first insulating layer, which is planarized by chemical mechanical polishing using a photoresist mask and a planarizing lacquer layer. In this case, the photoresist mask has structures covering the low-lying surface zones of the insulating layer. This ensures that the planarizing second photoresist layer has only slight surface variations, which can be compensated for during chemical mechanical polishing. In this method, the photoresist mask is generated from the mask used to produce the trenches, the pattern of the photoresist mask corresponding to the pattern of the trenches, but the lateral measurements of the patterns in the photoresist mask being reduced by a lateral allowance in comparison with the width of the trenches. Since a minimal structure width dependent on the respective technology cannot be undershot when the photoresist mask is formed, the trenches in any zones of the photoresist mask in which the pattern, defined using the trench pattern, of the photoresist mask does not fulfill this condition will be underfilled or overfilled, which has disadvantageous consequences for the planarity that can be achieved.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method of producing an integrated circuit configuration which overcomes the above-mentioned disadvantages of the prior art devices of this general type, in which greater planarity is achieved than in the prior art.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for producing an integrated circuit configuration, which includes the forming of trenches surrounding active regions in a main surface of a semiconductor substrate. Applying a photoresist layer to the insulating layer and structuring the applied photoresist layer to form a mask, using a data processing device, by the following steps:
providing an idealized pattern representing trenches formed in the semiconductor substrate and having contours which correspond to contours of the trenches and having idealized active regions which represent the active regions in the semiconductor substrate;
producing an idealized mask pattern on the basis of the idealized pattern containing rectilinear contours which are shifted by an allowance in comparison with the idealized pattern, the allowance starting on that side of the idealized active regions which is respectively remote therefrom, the idealized mask pattern having surface zones defined therein which are bounded by the rectilinear contours whose distance apart is shorter than a given minimum measurement; and
using the idealized mask pattern to produce a further idealized mask pattern in which the surface zones are replaced by minimum surface elements having length measurements which are greater than the given minimum measurement where a surface of the minimum surface elements essentially corresponds to a surface of the surface zone which the minimum surface elements are replacing, and where the mask is formed from the further idealized mask pattern.
Filling the trenches by depositing an insulating layer using the formed mask.
In one embodiment of the method, the idealized mask pattern has surface regions defined in it which are spaced apart from adjacent surface regions by a distance which is greater than the prescribed minimum measurement, and replacing surface zones arranged in these surface regions by the minimum surface elements.
In another embodiment of the method, the surface zones whose surface is smaller than the surface of a minimum surface element are replaced by the minimum surface element, controlled on the basis of a probability corresponding to the quotient formed by the surface of the surface zone and the surface of the minimum surface element.
In another embodiment of the method, having the step of planarizing the insulating layer by chemical mechanical polishing after the further photolayer has been applied.
In another embodiment of the method, the prescribed minimum measurement is at least as large as the length of a smallest structure which can be produced in the mask, and in that one of the minimum surface elements is rectangular, the sides of the rectangle having a length which is respectively at least as great as the length of the smallest structure which can be produced in the mask.
In the method, trenches defining active regions are produced in a main surface of a semiconductor substrate. The trenches are filled by depositing an insulating layer and by a planarization process, using a mask. The mask is produced in that, on the basis of the pattern of the trenches, a data processing device is used to define an idealized pattern which represents the semiconductor substrate's structures to be planarized. This pattern is used to define an idealized mask pattern. This idealized mask pattern contains raised structures which correspond to the pattern of the trenches but whose measurements are reduced parallel to the main surface by a lateral allowance in comparison with the measurements in the pattern of the trenches. This means that the rectilinear contours or the edges in the idealized mask pattern point in the direction away from the active regions enclosed by the trenches. The allowance starts on that side of the contours which is not situated on the same side as the adjoining active region. The idealized mask pattern subsequently has surface zones defined in it, in the data processing device, whose measurement in at least one dimension parallel to the main surface is smaller than a predetermined minimum measurement. The distance between the rectilinear contours forming the surface zone at least on two opposite sides is shorter than the minimum distance. The overall contour of the surface zone is composed from respectively rectilinear portions. The data processing device replaces these zones in the idealized mask pattern by auxiliary structures which have minimum surface elements. This finally produces a further idealized mask pattern. In the dimensions or directions parallel to the main surface, the minimum surface elements each have length measurements or lateral lengths of at least one predetermined minimum measurement. In this instance, the sum of the surfaces of the minimum surface elements in an auxiliary structure corresponds essentially to the surface of the surface zone in the idealized mask pattern, which surface zone is replaced by the respective auxiliary structure. The predetermined minimum measurement will in practice be essentially the same as the structure size which can be produced as a minimum in the respective technology. The further idealized mask pattern, obtained from the data processing device, is converted into the mask formed from the photoresist on the semiconductor substrate.
The surfaces of the minimum surface elements have a minimum surface defined by the minimum measurement, since the respective lateral length of the minimum surface is greater than the minimum measurement. The distance between opposite sides is greater than the minimum measurement. The minimum surface elements can also be larger than this minimum surface. The m

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