Method of producing a test pattern allowing determination of acc

Data processing: measuring – calibrating – or testing – Testing system – Signal generation or waveform shaping

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702125, 702117, 714738, G01R 313183

Patent

active

061637602

ABSTRACT:
A method and program for producing a test pattern of a semiconductor device includes using a result of timing verification of the semiconductor device to select an unverified path in the semiconductor device. A signal line on the unverified path is selected and a dummy element that always outputs an inconstant value is virtually inserted into the signal line. The test pattern for the semiconductor device with the virtually inserted dummy element is then produced.

REFERENCES:
patent: 5600787 (1997-02-01), Underwood et al.
patent: 5650938 (1997-07-01), Bootehsaz et al.
patent: 5650947 (1997-07-01), Okumura
Comer, David J. "Digital Logic and State Machine Design," (New York: CBS College Publishing, 1984), Chapter 1, p. 26, Dec. 1984.

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