Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Subsequent separation into plural bodies
Reexamination Certificate
2006-01-31
2006-01-31
Sarkar, Asok Kumar (Department: 2891)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
Subsequent separation into plural bodies
C438S455000, C438S459000
Reexamination Certificate
active
06991995
ABSTRACT:
A method of producing a semiconductor structure having at least one support substrate and an ultrathin layer. The method includes bonding a support substrate to a source substrate, detaching a useful layer along a zone of weakness to obtain an intermediate structure including at least the transferred useful layer and the support substrate, and treating the transferred useful layer to obtain an ultrathin layer on the support substrate. The source substrate includes a front face and a zone of weakness below the front face that defines the useful layer, and the useful layer is sufficiently thick to withstand heat treatments without forming defects therein so that it can be reduced in thickness to form the ultrathin layer. The resulting ultrathin layer is suitable for use in applications in the fields of electronics, optoelectronics or optics.
REFERENCES:
patent: 6100166 (2000-08-01), Sakaguchi et al.
patent: 6328796 (2001-12-01), Kub et al.
patent: 6335258 (2002-01-01), Aspar et al.
patent: 6500732 (2002-12-01), Henley et al.
patent: 2004/0029359 (2004-02-01), Letertre et al.
patent: 2004/0175901 (2004-09-01), Hadji et al.
patent: WO 00/48278 (2000-08-01), None
patent: WO 02/43112 (2002-05-01), None
Aaron Hand, Value-Added Wafers Push Chips Ahead, Semiconductor International, (2002).
M. Bruel, “Silicon on insulator material technology” by, “Electron Letter”, 31, 1201 (1995).
Q. Y. Tong, G. Cha, R. Gafiteau, and U. Gösele, “Low temperature wafer direct bonding”, Journal of Micro-electromechanical Systems, 3, 29 (1994).
Jean-Pierre Colinge, “Silicon-On-Insulator Technology: Materials to VLSI”, 2nd Edition by, published by “Kluwer Academic Publishers”, at pp. 50 and 51.
Aulnette Cécile
Bataillou Benoît
Ghyselen Bruno
Moriceau Hubert
Commissariat à l 'Energie Atomique (CEA)
S.O.I.Tec Silicon on Insulator Technologies S.A.
Sarkar Asok Kumar
Winston & Strawn LLP
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