Method of producing a MESFET semiconductor device having a reces

Details Method of producing a MESFET semiconductor device having a reces Method of producing a MESFET semiconductor device having a reces

1998-02-06

2000-09-12

Chaudhuri, Olik

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having schottky gate

438180, 438571, 438577, H01L 21338

Patent

active

06117713&

ABSTRACT:
An insulating layer is formed on a semiconductor substrate, and a first resist layer having a first resist opening portion is formed on the insulating layer. Then, the insulating layer is etched thought the opening portion to expose the substrate. After removing the first resist layer, a second resist layer having second resist opening portions are formed. One of the second resist opening portions is provided to expose the substrate, and a recess is formed in the substrate through the opening portion. Further, the insulating layer exposed from the other of the second resist opening portions is removed. Then, an electrode member for gate, source, and drain electrodes is deposited on the substrate. As a result, variations in intervals between the gate and drain electrodes and between the gate and source electrodes can be reduced.

REFERENCES:
patent: 5231040 (1993-07-01), Shimura
patent: 5362677 (1994-11-01), Sakamoto et al.
patent: 5770489 (1998-06-01), Onda
patent: 5869364 (1999-02-01), Nakano et al.
patent: 5888859 (1999-03-01), Oku et al.
"Double-Recess Lattice-Matched Heat" H. Kawasaki et al, pp. 2-312, an autumn conference of the electronic society, No Date.

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