Method of producing a complementary semiconductor device with a

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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29576W, 29580, 156646, 156648, 156649, 156653, 156657, 1566591, 1566611, 156662, 148175, 148187, 357 44, 357 59, H01L 21306, B44C 122, C03C 1500, C03C 2506

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045796254

ABSTRACT:
A method of producing a complementary semiconductor device having p-type islands and n-type islands in a dielectric isolation structure, including removing a projecting portion of a polycrystalline silicon layer, which is formed at the same time as the formation of an epitaxial silicon layer for one of two types of islands, so as to obtain an almost smooth exposed surface. The smooth surface contributes to the formation of a good masking pattern on the epitaxial silicon layer by a photoetching method, so that mesa portions for islands having exact dimensions are formed at predetermined positions.

REFERENCES:
patent: 4396460 (1983-08-01), Tamaki et al.
patent: 4408386 (1983-10-01), Takayashiki et al.
Electronics Engineers' Handbook, First Edition, McGraw-Hill Book Company, 1975, pp. 8-12, through 8-13.
IEEE Transactions on Electron Devices, vol. ED-28, No. 10, pp. 1199 through 1201, Oct. 1981, Nippon Telegraph and Telephone Public Corporation, Musashino Electrical Communication Laboratory, Midori-cho, Musashino-shi, Tokyo, Japan.
European Search Report.

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