Method of processing interrupt requests and information processi

Details Method of processing interrupt requests and information processi Method of processing interrupt requests and information processi

1997-08-25

1999-07-27

Sheikh, Ayaz R.

Electrical computers and digital data processing systems: input/

Interrupt processing

Interrupt queuing

710262, 710264, G06F 946

Patent

active

059283483

ABSTRACT:
A central processing unit (CPU) (162) furnishes an interrupt request acknowledge signal (107) to an interrupt control unit (ICU) (101) in response to an interrupt request signal (106) from the ICU (101). Then the CPU (102) reads the address specifying the origin of a program to process the interrupt request. After that, the CPU (102) causes the interrupt request acknowledge signal (107) to make a transition to its deactivated state. In response to the transition in the interrupt request acknowledge signal, the ICU (101) causes the interrupt request signal (106) to make a transition to its deactivated state and then clears an interrupt priority level signal (108) showing the priority level of the interrupt request (106).

REFERENCES:
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patent: 5581771 (1996-12-01), Osakabe
patent: 5630141 (1997-05-01), Ross et al.
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patent: 5689713 (1997-11-01), Normoyle et al.
patent: 5701494 (1997-12-01), Satoh
patent: 5748970 (1998-05-01), Miyaji et al.
patent: 5784271 (1998-07-01), Nagasaki
patent: 5819112 (1998-10-01), Kusters
patent: 5872982 (1999-02-01), Tipley

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