Method of processing a repeat block efficiently in a...

Details Method of processing a repeat block efficiently in a... Method of processing a repeat block efficiently in a...

2005-01-18

2005-01-18

Chan, Eddie (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Branching

C712S244000

Reexamination Certificate

active

06845443

ABSTRACT:
The invention presents a method for processing data in a processor having a processor core for processing a command in a pipeline form. The method comprises the steps of setting a repeat count value; executing a repeat block command to set a repeat ending address and a repeat starting address; comparing the repeat ending address and a memory address of the second command to identify whether they are identical to each other; checking whether the first command is a command for nonlinearly changing an executing order of a program if the repeat ending address and the memory address of the second command are identical to each other; and storing the memory address of the second command while not reducing the repeat count value if the first command is a command for nonlinearly changing the executing order of the program.

REFERENCES:
patent: 5535348 (1996-07-01), Leach et al.
patent: 5960210 (1999-09-01), Jin

Affiliated with

Also associated with

Rating

Method of processing a repeat block efficiently in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of processing a repeat block efficiently in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of processing a repeat block efficiently in a... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3367052