Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent
1995-10-16
1998-09-01
Gossage, Glen
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
395736, 395737, 365218, 711103, G06F 1200, G06F 946, G11C 1602
Patent
active
058023437
ABSTRACT:
A method of prioritizing program commands relative to erase commands in an operation queue for a memory includes the step of initiating an erase of a first block for a first erase command in the operation queue. The memory has a status indicator for each block. The status indicator indicates whether an erase command for its corresponding block has been received and removed from the operation queue but not yet executed (e.g., an absorbed erase command). An interrupt window is executed during the erasure of the first block to determine if the operation queue has received a second command for a second block. If the second command is a program command, then one of three steps is executed. If the first and second blocks are the same, then execution of the program command is deferred until after the erasure of the first block is complete. If the first and second blocks are not the same then the program command is either executed or deferred in accordance with the status indicator for the second block. If the status indicator for the second block indicates that it has been absorbed (e.g., it is set), then execution of the program command will be deferred until after the erasure of the first block is complete. Otherwise, if the status indicator for the second block indicates that it has not been absorbed (e.g. not set), then the erasure of the first block will be interrupted to execute the program command.
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Durante Richard Joseph
Fandrich Mickey Lee
Goodell Timothy Wade
Gould Geoffrey Alan
Gossage Glen
Intel Corporation
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